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ac/llvm: add gl_shader_stage parameter into ac_build_s_barrier

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this will be used later

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16304>
This commit is contained in:
Marek Olšák
2022-05-02 21:38:07 -04:00
committed by Marge Bot
parent fb51a3c4b0
commit e4882d6b7e
7 changed files with 33 additions and 29 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/amd/llvm/ac_llvm_build.c
+3 -3
View File
@@ -388,7 +388,7 @@ LLVMValueRef ac_build_phi(struct ac_llvm_context *ctx, LLVMTypeRef type, unsigne
return phi;
}
void ac_build_s_barrier(struct ac_llvm_context *ctx)
void ac_build_s_barrier(struct ac_llvm_context *ctx, gl_shader_stage stage)
{
ac_build_intrinsic(ctx, "llvm.amdgcn.s.barrier", ctx->voidt, NULL, 0, AC_FUNC_ATTR_CONVERGENT);
}
@@ -4019,7 +4019,7 @@ void ac_build_wg_wavescan_bottom(struct ac_llvm_context *ctx, struct ac_wg_scan
void ac_build_wg_wavescan(struct ac_llvm_context *ctx, struct ac_wg_scan *ws)
{
ac_build_wg_wavescan_top(ctx, ws);
ac_build_s_barrier(ctx);
ac_build_s_barrier(ctx, ws->stage);
ac_build_wg_wavescan_bottom(ctx, ws);
}
@@ -4081,7 +4081,7 @@ void ac_build_wg_scan_bottom(struct ac_llvm_context *ctx, struct ac_wg_scan *ws)
void ac_build_wg_scan(struct ac_llvm_context *ctx, struct ac_wg_scan *ws)
{
ac_build_wg_scan_top(ctx, ws);
ac_build_s_barrier(ctx);
ac_build_s_barrier(ctx, ws->stage);
ac_build_wg_scan_bottom(ctx, ws);
}
src/amd/llvm/ac_llvm_build.h
+2 -1
View File
@@ -175,7 +175,7 @@ void ac_build_type_name_for_intr(LLVMTypeRef type, char *buf, unsigned bufsize);
LLVMValueRef ac_build_phi(struct ac_llvm_context *ctx, LLVMTypeRef type, unsigned count_incoming,
LLVMValueRef *values, LLVMBasicBlockRef *blocks);
void ac_build_s_barrier(struct ac_llvm_context *ctx);
void ac_build_s_barrier(struct ac_llvm_context *ctx, gl_shader_stage stage);
void ac_build_optimization_barrier(struct ac_llvm_context *ctx, LLVMValueRef *pgpr, bool sgpr);
LLVMValueRef ac_build_shader_clock(struct ac_llvm_context *ctx, nir_scope scope);
@@ -502,6 +502,7 @@ LLVMValueRef ac_build_reduce(struct ac_llvm_context *ctx, LLVMValueRef src, nir_
* values across an entire workgroup, while respecting the order of waves.
*/
struct ac_wg_scan {
gl_shader_stage stage;
bool enable_reduce;
bool enable_exclusive;
bool enable_inclusive;
src/amd/llvm/ac_nir_to_llvm.c
+1 -1
View File
@@ -2959,7 +2959,7 @@ void ac_emit_barrier(struct ac_llvm_context *ac, gl_shader_stage stage)
if (ac->chip_class == GFX6 && stage == MESA_SHADER_TESS_CTRL)
return;
ac_build_s_barrier(ac);
ac_build_s_barrier(ac, stage);
}
static void emit_discard(struct ac_nir_context *ctx, const nir_intrinsic_instr *instr)
src/amd/vulkan/radv_nir_to_llvm.c
+7 -6
View File
@@ -1338,7 +1338,7 @@ handle_ngg_outputs_post_2(struct radv_shader_context *ctx)
if (ctx->stage == MESA_SHADER_VERTEX) {
/* Wait for GS stores to finish. */
ac_build_s_barrier(&ctx->ac);
ac_build_s_barrier(&ctx->ac, ctx->stage);
tmp = ac_build_gep0(&ctx->ac, ctx->esgs_ring, get_thread_id_in_tg(ctx));
values[0] = LLVMBuildLoad(builder, tmp, "");
@@ -1384,7 +1384,7 @@ gfx10_ngg_gs_emit_prologue(struct radv_shader_context *ctx)
LLVMBuildBr(ctx->ac.builder, merge_block);
LLVMPositionBuilderAtEnd(ctx->ac.builder, merge_block);
ac_build_s_barrier(&ctx->ac);
ac_build_s_barrier(&ctx->ac, ctx->stage);
}
static void
@@ -1459,7 +1459,7 @@ gfx10_ngg_gs_emit_epilogue_2(struct radv_shader_context *ctx)
LLVMBuilderRef builder = ctx->ac.builder;
LLVMValueRef tmp, tmp2;
ac_build_s_barrier(&ctx->ac);
ac_build_s_barrier(&ctx->ac, ctx->stage);
const LLVMValueRef tid = get_thread_id_in_tg(ctx);
LLVMValueRef num_emit_threads = ngg_get_prim_cnt(ctx);
@@ -1522,6 +1522,7 @@ gfx10_ngg_gs_emit_epilogue_2(struct radv_shader_context *ctx)
/* Inclusive scan addition across the current wave. */
LLVMValueRef vertlive = LLVMBuildLoad(builder, vertliveptr, "");
struct ac_wg_scan vertlive_scan = {0};
vertlive_scan.stage = ctx->stage;
vertlive_scan.op = nir_op_iadd;
vertlive_scan.enable_reduce = true;
vertlive_scan.enable_exclusive = true;
@@ -1564,7 +1565,7 @@ gfx10_ngg_gs_emit_epilogue_2(struct radv_shader_context *ctx)
}
ac_build_endif(&ctx->ac, 5130);
ac_build_s_barrier(&ctx->ac);
ac_build_s_barrier(&ctx->ac, ctx->stage);
/* Export primitive data */
tmp = LLVMBuildICmp(builder, LLVMIntULT, tid, num_emit_threads, "");
@@ -2076,7 +2077,7 @@ ac_translate_nir_to_llvm(struct ac_llvm_compiler *ac_llvm,
/* GFX10 hang workaround - there needs to be an s_barrier before gs_alloc_req always */
if (ctx.ac.chip_class == GFX10 && shader_count == 1)
ac_build_s_barrier(&ctx.ac);
ac_build_s_barrier(&ctx.ac, shaders[0]->info.stage);
}
for (int shader_idx = 0; shader_idx < shader_count; ++shader_idx) {
@@ -2149,7 +2150,7 @@ ac_translate_nir_to_llvm(struct ac_llvm_compiler *ac_llvm,
* and contains a barrier, it will wait there and then
* reach s_endpgm.
*/
ac_emit_barrier(&ctx.ac, ctx.stage);
ac_build_s_barrier(&ctx.ac, shaders[shader_idx]->info.stage);
}
nir_foreach_shader_out_variable(variable, shaders[shader_idx]) scan_shader_output_decl(