diff --git a/src/intel/genxml/gen12.xml b/src/intel/genxml/gen12.xml
index 73c23fa5f21..412adf1286e 100644
--- a/src/intel/genxml/gen12.xml
+++ b/src/intel/genxml/gen12.xml
@@ -7369,11 +7369,6 @@
     <field name="RDE Done" start="31" end="31" type="bool"/>
   </register>
 
-  <register name="SAMPLER_MODE" length="1" num="0x0e18c">
-    <field name="Headerless Message for Pre-emptable Contexts" start="5" end="5" type="bool"/>
-    <field name="Headerless Message for Pre-emptable Contexts Mask" start="21" end="21" type="bool"/>
-  </register>
-
   <register name="SC_INSTDONE" length="1" num="0x7100">
     <field name="SVL Done" start="0" end="0" type="bool"/>
     <field name="WMFE Done" start="1" end="1" type="bool"/>
diff --git a/src/intel/genxml/gen125.xml b/src/intel/genxml/gen125.xml
index 2492f12e735..1125d0cbf65 100644
--- a/src/intel/genxml/gen125.xml
+++ b/src/intel/genxml/gen125.xml
@@ -7791,11 +7791,6 @@
     <field name="VMEM L3REQARB1 Done" start="31" end="31" type="bool"/>
   </register>
 
-  <register name="SAMPLER_MODE" length="1" num="0x0e18c">
-    <field name="Headerless Message for Pre-emptable Contexts" start="5" end="5" type="bool"/>
-    <field name="Headerless Message for Pre-emptable Contexts Mask" start="21" end="21" type="bool"/>
-  </register>
-
   <register name="SC_INSTDONE" length="1" num="0x7100">
     <field name="SVL Done" start="0" end="0" type="bool"/>
     <field name="WMFE Done" start="1" end="1" type="bool"/>