From e3a0e97300c877ec95e88efa35d90ad5e319273a Mon Sep 17 00:00:00 2001 From: Kenneth Graunke Date: Tue, 11 Jan 2022 15:06:06 -0800 Subject: [PATCH] intel: Limit Wa_1607854226 to Gfx12.0 only This workaround is needed on all Gfx12.0 parts, but doesn't appear to be necessary on XeHP. The other drivers do not appear to be applying this workaround on those parts. As further evidence, we accidentally added the 3DSTATE_BINDING_TABLE_POOL_ALLOC commands after switching back to GPGPU mode, which would be an incorrect way to implement the workaround, and things seem to be working. Reviewed-by: Ian Romanick Part-of: --- src/gallium/drivers/iris/iris_state.c | 8 ++++---- src/intel/vulkan/genX_cmd_buffer.c | 4 ++-- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/src/gallium/drivers/iris/iris_state.c b/src/gallium/drivers/iris/iris_state.c index 29bdbc46d22..333896a91a9 100644 --- a/src/gallium/drivers/iris/iris_state.c +++ b/src/gallium/drivers/iris/iris_state.c @@ -1157,7 +1157,7 @@ iris_init_compute_context(struct iris_batch *batch) * * Start with pipeline in 3D mode to set the STATE_BASE_ADDRESS. */ -#if GFX_VER == 12 +#if GFX_VERx10 == 120 emit_pipeline_select(batch, _3D); #else emit_pipeline_select(batch, GPGPU); @@ -1169,7 +1169,7 @@ iris_init_compute_context(struct iris_batch *batch) iris_init_common_context(batch); -#if GFX_VER == 12 +#if GFX_VERx10 == 120 emit_pipeline_select(batch, GPGPU); #endif @@ -5460,7 +5460,7 @@ iris_update_binder_address(struct iris_batch *batch, flush_before_state_base_change(batch); -#if GFX_VER == 12 +#if GFX_VERx10 == 120 /* Wa_1607854226: * * Workaround the non pipelined state not applying in MEDIA/GPGPU pipeline @@ -5491,7 +5491,7 @@ iris_update_binder_address(struct iris_batch *batch, #endif } -#if GFX_VER == 12 +#if GFX_VERx10 == 120 /* Wa_1607854226: * * Put the pipeline back into compute mode. diff --git a/src/intel/vulkan/genX_cmd_buffer.c b/src/intel/vulkan/genX_cmd_buffer.c index 6a9cac486d9..0292fccc316 100644 --- a/src/intel/vulkan/genX_cmd_buffer.c +++ b/src/intel/vulkan/genX_cmd_buffer.c @@ -120,7 +120,7 @@ genX(cmd_buffer_emit_state_base_address)(struct anv_cmd_buffer *cmd_buffer) anv_debug_dump_pc(pc); } -#if GFX_VER == 12 +#if GFX_VERx10 == 120 /* Wa_1607854226: * * Workaround the non pipelined state not applying in MEDIA/GPGPU pipeline @@ -210,7 +210,7 @@ genX(cmd_buffer_emit_state_base_address)(struct anv_cmd_buffer *cmd_buffer) # endif } -#if GFX_VER == 12 +#if GFX_VERx10 == 120 /* Wa_1607854226: * * Put the pipeline back into its current mode.