radv: pass radv_shader_info to gfx10_get_ngg_info()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27722>
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e3863a22bb
@@ -1330,16 +1330,16 @@ clamp_gsprims_to_esverts(unsigned *max_gsprims, unsigned max_esverts, unsigned m
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}
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static unsigned
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radv_get_num_input_vertices(const struct radv_shader_stage *es_stage, const struct radv_shader_stage *gs_stage)
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radv_get_num_input_vertices(const struct radv_shader_info *es_info, const struct radv_shader_info *gs_info)
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{
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if (gs_stage) {
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return gs_stage->nir->info.gs.vertices_in;
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if (gs_info) {
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return gs_info->gs.vertices_in;
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}
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if (es_stage->stage == MESA_SHADER_TESS_EVAL) {
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if (es_stage->nir->info.tess.point_mode)
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if (es_info->stage == MESA_SHADER_TESS_EVAL) {
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if (es_info->tes.point_mode)
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return 1;
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if (es_stage->nir->info.tess._primitive_mode == TESS_PRIMITIVE_ISOLINES)
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if (es_info->tes._primitive_mode == TESS_PRIMITIVE_ISOLINES)
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return 2;
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return 3;
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}
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@@ -1348,16 +1348,16 @@ radv_get_num_input_vertices(const struct radv_shader_stage *es_stage, const stru
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}
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static unsigned
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radv_get_pre_rast_input_topology(const struct radv_shader_stage *es_stage, const struct radv_shader_stage *gs_stage)
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radv_get_pre_rast_input_topology(const struct radv_shader_info *es_info, const struct radv_shader_info *gs_info)
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{
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if (gs_stage) {
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return gs_stage->nir->info.gs.input_primitive;
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if (gs_info) {
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return gs_info->gs.input_prim;
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}
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if (es_stage->stage == MESA_SHADER_TESS_EVAL) {
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if (es_stage->nir->info.tess.point_mode)
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if (es_info->stage == MESA_SHADER_TESS_EVAL) {
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if (es_info->tes.point_mode)
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return MESA_PRIM_POINTS;
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if (es_stage->nir->info.tess._primitive_mode == TESS_PRIMITIVE_ISOLINES)
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if (es_info->tes._primitive_mode == TESS_PRIMITIVE_ISOLINES)
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return MESA_PRIM_LINES;
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return MESA_PRIM_TRIANGLES;
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}
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@@ -1366,18 +1366,16 @@ radv_get_pre_rast_input_topology(const struct radv_shader_stage *es_stage, const
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}
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static void
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gfx10_get_ngg_info(const struct radv_device *device, struct radv_shader_stage *es_stage,
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struct radv_shader_stage *gs_stage, struct gfx10_ngg_info *out)
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gfx10_get_ngg_info(const struct radv_device *device, struct radv_shader_info *es_info, struct radv_shader_info *gs_info,
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struct gfx10_ngg_info *out)
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{
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const enum amd_gfx_level gfx_level = device->physical_device->rad_info.gfx_level;
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struct radv_shader_info *gs_info = gs_stage ? &gs_stage->info : NULL;
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struct radv_shader_info *es_info = &es_stage->info;
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const unsigned max_verts_per_prim = radv_get_num_input_vertices(es_stage, gs_stage);
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const unsigned min_verts_per_prim = gs_stage ? max_verts_per_prim : 1;
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const unsigned max_verts_per_prim = radv_get_num_input_vertices(es_info, gs_info);
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const unsigned min_verts_per_prim = gs_info ? max_verts_per_prim : 1;
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const unsigned gs_num_invocations = gs_stage ? MAX2(gs_info->gs.invocations, 1) : 1;
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const unsigned gs_num_invocations = gs_info ? MAX2(gs_info->gs.invocations, 1) : 1;
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const unsigned input_prim = radv_get_pre_rast_input_topology(es_stage, gs_stage);
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const unsigned input_prim = radv_get_pre_rast_input_topology(es_info, gs_info);
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const bool uses_adjacency = input_prim == MESA_PRIM_LINES_ADJACENCY || input_prim == MESA_PRIM_TRIANGLES_ADJACENCY;
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/* All these are in dwords: */
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@@ -1411,7 +1409,7 @@ gfx10_get_ngg_info(const struct radv_device *device, struct radv_shader_stage *e
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*/
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max_esverts_base = MIN2(max_esverts_base, 251 + max_verts_per_prim - 1);
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if (gs_stage) {
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if (gs_info) {
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unsigned max_out_verts_per_gsprim = gs_info->gs.vertices_out * gs_num_invocations;
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if (max_out_verts_per_gsprim <= 256) {
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@@ -1448,7 +1446,7 @@ gfx10_get_ngg_info(const struct radv_device *device, struct radv_shader_stage *e
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* corresponding to the ES thread of the provoking vertex. All
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* ES threads load and export PrimitiveID for their thread.
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*/
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if (es_stage->stage == MESA_SHADER_VERTEX && es_stage->info.outinfo.export_prim_id)
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if (es_info->stage == MESA_SHADER_VERTEX && es_info->outinfo.export_prim_id)
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esvert_lds_size = MAX2(esvert_lds_size, 1);
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}
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@@ -1489,7 +1487,7 @@ gfx10_get_ngg_info(const struct radv_device *device, struct radv_shader_stage *e
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unsigned orig_max_gsprims;
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unsigned wavesize;
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if (gs_stage) {
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if (gs_info) {
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wavesize = gs_info->wave_size;
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} else {
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wavesize = es_info->wave_size;
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@@ -1541,12 +1539,12 @@ gfx10_get_ngg_info(const struct radv_device *device, struct radv_shader_stage *e
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}
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unsigned max_out_vertices = max_vert_out_per_gs_instance ? gs_info->gs.vertices_out
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: gs_stage ? max_gsprims * gs_num_invocations * gs_info->gs.vertices_out
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: max_esverts;
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: gs_info ? max_gsprims * gs_num_invocations * gs_info->gs.vertices_out
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: max_esverts;
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assert(max_out_vertices <= 256);
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unsigned prim_amp_factor = 1;
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if (gs_stage) {
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if (gs_info) {
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/* Number of output primitives per GS input primitive after
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* GS instancing. */
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prim_amp_factor = gs_info->gs.vertices_out;
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@@ -1571,7 +1569,7 @@ gfx10_get_ngg_info(const struct radv_device *device, struct radv_shader_stage *e
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/* Don't count unusable vertices. */
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out->esgs_ring_size = MIN2(max_esverts, max_gsprims * max_verts_per_prim) * esvert_lds_size * 4;
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if (gs_stage) {
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if (gs_info) {
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out->vgt_esgs_ring_itemsize = es_info->esgs_itemsize / 4;
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} else {
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out->vgt_esgs_ring_itemsize = 1;
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@@ -1581,7 +1579,7 @@ gfx10_get_ngg_info(const struct radv_device *device, struct radv_shader_stage *e
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unsigned workgroup_size =
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ac_compute_ngg_workgroup_size(max_esverts, max_gsprims * gs_num_invocations, max_out_vertices, prim_amp_factor);
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if (gs_stage) {
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if (gs_info) {
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gs_info->workgroup_size = workgroup_size;
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}
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es_info->workgroup_size = workgroup_size;
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@@ -1655,7 +1653,7 @@ radv_link_shaders_info(struct radv_device *device, struct radv_shader_stage *pro
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struct radv_shader_stage *gs_stage = consumer && consumer->stage == MESA_SHADER_GEOMETRY ? consumer : NULL;
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struct gfx10_ngg_info *out = gs_stage ? &gs_stage->info.ngg_info : &producer->info.ngg_info;
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gfx10_get_ngg_info(device, producer, gs_stage, out);
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gfx10_get_ngg_info(device, &producer->info, gs_stage ? &gs_stage->info : NULL, out);
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/* Determine other NGG settings like culling for VS or TES without GS. */
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if (!gs_stage) {
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