From dd68825febde707d87dd7e9f262f7ec41caff0f2 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Daniel=20Sch=C3=BCrmann?= <daniel@schuermann.dev>
Date: Thu, 18 Sep 2025 14:07:55 +0200
Subject: [PATCH] radeonsi: allow for unsigned wraps for shared memory
 intrinsics in nir_opt_offsets

Also set correct maxima.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37453>
---
 src/gallium/drivers/radeonsi/si_shader.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
index 82ee5f6ed53..66bf3cae7fd 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -4,6 +4,7 @@
  * SPDX-License-Identifier: MIT
  */
 
+#include "ac_nir.h"
 #include "ac_rtld.h"
 #include "nir_builder.h"
 #include "nir_serialize.h"
@@ -1707,7 +1708,9 @@ static void run_late_optimization_and_lowering_passes(struct si_nir_shader_ctx *
    static const nir_opt_offsets_options offset_options = {
       .uniform_max = 0,
       .buffer_max = ~0,
-      .shared_max = ~0,
+      .shared_max = UINT16_MAX,
+      .shared_atomic_max = UINT16_MAX,
+      .allow_offset_wrap_cb = ac_nir_allow_offset_wrap_cb,
    };
    NIR_PASS(_, nir, nir_opt_offsets, &offset_options);