From dc79d7af55fd5088648513a0519ea7e723a6728e Mon Sep 17 00:00:00 2001 From: Romaric Jodin Date: Tue, 2 Dec 2025 09:20:03 +0100 Subject: [PATCH] pan/bi: bi_alu_src_index: remove invalid assert `comps <= (1 << subword_shift)` cannot be guarantee. Here is an example: ``` 8x2 %27 = @load_ssbo (%26 (0x1000001), %4) (access=readonly|reorderable, align_mul=2, align_offset=0, offset_shift=0) 8x2 %32 = ior %25, %31 32 %34 = ult32 %33 (0x7), %12 8x2 %35 = b32csel %34.xx, %27, %32 ``` When processing `%34.xx` in `bi_emit_alu` (for `instr->src[0]`), `comps` is computed from the instr definition (`%35`), but `subword_shift` from the src bitsize. In that case comps is greater than `1 << subword_shift`, but this is supported by `bi_alu_src_index`. This example is extracted from `dEQP-VK.spirv_assembly.type.vec2.i8.bit_field_insert_offset16_count16_comp` Reviewed-by: Christoph Pillmayer Part-of: --- src/panfrost/compiler/bifrost_compile.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/src/panfrost/compiler/bifrost_compile.c b/src/panfrost/compiler/bifrost_compile.c index 65fae716102..4139f472f62 100644 --- a/src/panfrost/compiler/bifrost_compile.c +++ b/src/panfrost/compiler/bifrost_compile.c @@ -2737,9 +2737,6 @@ bi_alu_src_index(bi_builder *b, nir_alu_src src, unsigned comps) /* Compose the subword swizzle with existing (identity) swizzle */ assert(idx.swizzle == BI_SWIZZLE_H01); - /* Bigger vectors should have been lowered */ - assert(comps <= (1 << subword_shift)); - if (bitsize == 16) { unsigned c0 = src.swizzle[0] & 1; unsigned c1 = (comps > 1) ? src.swizzle[1] & 1 : c0;