From dc76cfc7814f213fc096cad5244e7b49cd0e0e68 Mon Sep 17 00:00:00 2001
From: Caio Oliveira <caio.oliveira@intel.com>
Date: Wed, 1 Nov 2023 12:51:33 -0700
Subject: [PATCH] intel/compiler: Collect NIR-only passes in intel_nir.h

Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27644>
---
 src/gallium/drivers/crocus/crocus_program.c   |  1 +
 src/gallium/drivers/iris/iris_program.c       |  1 +
 src/intel/blorp/blorp.c                       |  1 +
 src/intel/compiler/brw_fs.cpp                 |  1 +
 src/intel/compiler/brw_kernel.c               |  1 +
 src/intel/compiler/brw_nir.c                  | 20 +--------
 src/intel/compiler/brw_nir.h                  | 31 -------------
 .../compiler/brw_nir_blockify_uniform_loads.c |  5 ++-
 .../brw_nir_clamp_image_1d_2d_array_sizes.c   |  2 +-
 .../compiler/brw_nir_clamp_per_vertex_loads.c |  2 +-
 .../compiler/brw_nir_lower_conversions.c      |  2 +-
 ..._lower_non_uniform_barycentric_at_sample.c |  2 +-
 ...brw_nir_lower_non_uniform_resource_intel.c |  2 +-
 .../brw_nir_lower_shading_rate_output.c       |  2 +-
 src/intel/compiler/brw_nir_lower_sparse.c     |  2 +-
 src/intel/compiler/brw_nir_lower_texture.c    |  2 +-
 .../compiler/brw_nir_opt_peephole_ffma.c      |  2 +-
 .../compiler/brw_nir_opt_peephole_imul32x16.c |  2 +-
 src/intel/compiler/brw_nir_rt.c               |  1 +
 src/intel/compiler/brw_nir_tcs_workarounds.c  |  2 +-
 src/intel/compiler/brw_vec4_tcs.cpp           |  1 +
 src/intel/compiler/intel_nir.c                | 28 ++++++++++++
 src/intel/compiler/intel_nir.h                | 43 +++++++++++++++++++
 src/intel/compiler/meson.build                | 32 ++++++++------
 src/intel/vulkan/anv_internal_kernels.c       |  1 +
 src/intel/vulkan/anv_pipeline.c               |  1 +
 src/intel/vulkan_hasvk/anv_pipeline.c         |  2 +-
 27 files changed, 115 insertions(+), 77 deletions(-)
 create mode 100644 src/intel/compiler/intel_nir.c
 create mode 100644 src/intel/compiler/intel_nir.h

diff --git a/src/gallium/drivers/crocus/crocus_program.c b/src/gallium/drivers/crocus/crocus_program.c
index 2199c7dff4b..d3c8d8eebec 100644
--- a/src/gallium/drivers/crocus/crocus_program.c
+++ b/src/gallium/drivers/crocus/crocus_program.c
@@ -45,6 +45,7 @@
 #include "intel/compiler/brw_compiler.h"
 #include "intel/compiler/brw_nir.h"
 #include "intel/compiler/brw_prim.h"
+#include "intel/compiler/intel_nir.h"
 #include "crocus_context.h"
 #include "nir/tgsi_to_nir.h"
 #include "program/prog_instruction.h"
diff --git a/src/gallium/drivers/iris/iris_program.c b/src/gallium/drivers/iris/iris_program.c
index 81c0fdc0205..837315def34 100644
--- a/src/gallium/drivers/iris/iris_program.c
+++ b/src/gallium/drivers/iris/iris_program.c
@@ -44,6 +44,7 @@
 #include "compiler/nir/nir_serialize.h"
 #include "intel/compiler/brw_compiler.h"
 #include "intel/compiler/brw_nir.h"
+#include "intel/compiler/intel_nir.h"
 #include "intel/compiler/brw_prim.h"
 #include "iris_context.h"
 #include "nir/tgsi_to_nir.h"
diff --git a/src/intel/blorp/blorp.c b/src/intel/blorp/blorp.c
index b6107dfca4e..cdaec5a23e9 100644
--- a/src/intel/blorp/blorp.c
+++ b/src/intel/blorp/blorp.c
@@ -23,6 +23,7 @@
 
 #include <errno.h>
 
+#include "compiler/intel_nir.h"
 #include "blorp_priv.h"
 #include "compiler/brw_compiler.h"
 #include "compiler/brw_nir.h"
diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp
index 15836a74ef1..c45d2db2c2a 100644
--- a/src/intel/compiler/brw_fs.cpp
+++ b/src/intel/compiler/brw_fs.cpp
@@ -37,6 +37,7 @@
 #include "brw_cfg.h"
 #include "brw_dead_control_flow.h"
 #include "brw_private.h"
+#include "intel_nir.h"
 #include "shader_enums.h"
 #include "dev/intel_debug.h"
 #include "dev/intel_wa.h"
diff --git a/src/intel/compiler/brw_kernel.c b/src/intel/compiler/brw_kernel.c
index 3ae93c316bb..0350b031810 100644
--- a/src/intel/compiler/brw_kernel.c
+++ b/src/intel/compiler/brw_kernel.c
@@ -23,6 +23,7 @@
 
 #include "brw_kernel.h"
 #include "brw_nir.h"
+#include "intel_nir.h"
 
 #include "nir_clc_helpers.h"
 #include "compiler/nir/nir_builder.h"
diff --git a/src/intel/compiler/brw_nir.c b/src/intel/compiler/brw_nir.c
index acf71586348..0fddf6ba686 100644
--- a/src/intel/compiler/brw_nir.c
+++ b/src/intel/compiler/brw_nir.c
@@ -21,6 +21,7 @@
  * IN THE SOFTWARE.
  */
 
+#include "intel_nir.h"
 #include "brw_nir.h"
 #include "brw_nir_rt.h"
 #include "brw_shader.h"
@@ -2150,22 +2151,3 @@ brw_nir_get_var_type(const struct nir_shader *nir, nir_variable *var)
    return type;
 }
 
-bool
-brw_nir_pulls_at_sample(nir_shader *shader)
-{
-   nir_foreach_function_impl(impl, shader) {
-      nir_foreach_block(block, impl) {
-         nir_foreach_instr(instr, block) {
-            if (instr->type != nir_instr_type_intrinsic)
-               continue;
-
-            nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
-
-            if (intrin->intrinsic == nir_intrinsic_load_barycentric_at_sample)
-               return true;
-         }
-      }
-   }
-
-   return false;
-}
diff --git a/src/intel/compiler/brw_nir.h b/src/intel/compiler/brw_nir.h
index aa168bcdfec..00588c24213 100644
--- a/src/intel/compiler/brw_nir.h
+++ b/src/intel/compiler/brw_nir.h
@@ -192,8 +192,6 @@ void brw_nir_lower_tcs_outputs(nir_shader *nir, const struct intel_vue_map *vue,
                                enum tess_primitive_mode tes_primitive_mode);
 void brw_nir_lower_fs_outputs(nir_shader *nir);
 
-bool brw_nir_lower_conversions(nir_shader *nir);
-
 bool brw_nir_lower_cmat(nir_shader *nir, unsigned subgroup_size);
 
 bool brw_nir_lower_shading_rate_output(nir_shader *nir);
@@ -212,27 +210,15 @@ struct brw_nir_lower_storage_image_opts {
 bool brw_nir_lower_storage_image(nir_shader *nir,
                                  const struct brw_nir_lower_storage_image_opts *opts);
 
-struct brw_nir_lower_texture_opts {
-   bool combined_lod_and_array_index;
-};
-bool brw_nir_lower_texture(nir_shader *nir,
-                           const struct brw_nir_lower_texture_opts *opts);
-
 bool brw_nir_lower_mem_access_bit_sizes(nir_shader *shader,
                                         const struct
                                         intel_device_info *devinfo);
 
-bool brw_nir_lower_non_uniform_resource_intel(nir_shader *shader);
-
-bool brw_nir_cleanup_resource_intel(nir_shader *shader);
-
 void brw_postprocess_nir(nir_shader *nir,
                          const struct brw_compiler *compiler,
                          bool debug_enabled,
                          enum brw_robustness_flags robust_flags);
 
-bool brw_nir_clamp_image_1d_2d_array_sizes(nir_shader *shader);
-
 bool brw_nir_apply_attribute_workarounds(nir_shader *nir,
                                          const uint8_t *attrib_wa_flags);
 
@@ -240,10 +226,6 @@ bool brw_nir_apply_trig_workarounds(nir_shader *nir);
 
 bool brw_nir_limit_trig_input_range_workaround(nir_shader *nir);
 
-void brw_nir_apply_tcs_quads_workaround(nir_shader *nir);
-
-bool brw_nir_lower_non_uniform_barycentric_at_sample(nir_shader *nir);
-
 void brw_nir_apply_key(nir_shader *nir,
                        const struct brw_compiler *compiler,
                        const struct brw_base_prog_key *key,
@@ -268,17 +250,6 @@ void brw_nir_analyze_ubo_ranges(const struct brw_compiler *compiler,
                                 nir_shader *nir,
                                 struct brw_ubo_range out_ranges[4]);
 
-bool brw_nir_opt_peephole_ffma(nir_shader *shader);
-
-bool brw_nir_opt_peephole_imul32x16(nir_shader *shader);
-
-bool brw_nir_clamp_per_vertex_loads(nir_shader *shader);
-
-bool brw_nir_lower_patch_vertices_in(nir_shader *shader, unsigned input_vertices);
-
-bool brw_nir_blockify_uniform_loads(nir_shader *shader,
-                                    const struct intel_device_info *devinfo);
-
 void brw_nir_optimize(nir_shader *nir, bool is_scalar,
                       const struct intel_device_info *devinfo);
 
@@ -286,8 +257,6 @@ nir_shader *brw_nir_create_passthrough_tcs(void *mem_ctx,
                                            const struct brw_compiler *compiler,
                                            const struct brw_tcs_prog_key *key);
 
-bool brw_nir_pulls_at_sample(nir_shader *shader);
-
 #define BRW_NIR_FRAG_OUTPUT_INDEX_SHIFT 0
 #define BRW_NIR_FRAG_OUTPUT_INDEX_MASK INTEL_MASK(0, 0)
 #define BRW_NIR_FRAG_OUTPUT_LOCATION_SHIFT 1
diff --git a/src/intel/compiler/brw_nir_blockify_uniform_loads.c b/src/intel/compiler/brw_nir_blockify_uniform_loads.c
index 01953d1c72e..d978d2c499a 100644
--- a/src/intel/compiler/brw_nir_blockify_uniform_loads.c
+++ b/src/intel/compiler/brw_nir_blockify_uniform_loads.c
@@ -21,9 +21,10 @@
  * IN THE SOFTWARE.
  */
 
+#include "dev/intel_device_info.h"
+#include "intel_nir.h"
 #include "isl/isl.h"
-
-#include "brw_nir.h"
+#include "nir_builder.h"
 
 static bool
 brw_nir_blockify_uniform_loads_instr(nir_builder *b,
diff --git a/src/intel/compiler/brw_nir_clamp_image_1d_2d_array_sizes.c b/src/intel/compiler/brw_nir_clamp_image_1d_2d_array_sizes.c
index 569caec3d9b..a1e2b5c995a 100644
--- a/src/intel/compiler/brw_nir_clamp_image_1d_2d_array_sizes.c
+++ b/src/intel/compiler/brw_nir_clamp_image_1d_2d_array_sizes.c
@@ -22,7 +22,7 @@
  */
 
 #include "compiler/nir/nir_builder.h"
-#include "brw_nir.h"
+#include "intel_nir.h"
 
 /**
  * Wa_1806565034:
diff --git a/src/intel/compiler/brw_nir_clamp_per_vertex_loads.c b/src/intel/compiler/brw_nir_clamp_per_vertex_loads.c
index bd7c6964fa4..d88c0b8fcf1 100644
--- a/src/intel/compiler/brw_nir_clamp_per_vertex_loads.c
+++ b/src/intel/compiler/brw_nir_clamp_per_vertex_loads.c
@@ -29,7 +29,7 @@
  * lowered.
  */
 
-#include "brw_nir.h"
+#include "intel_nir.h"
 #include "compiler/nir/nir_builder.h"
 #include "compiler/nir/nir_deref.h"
 
diff --git a/src/intel/compiler/brw_nir_lower_conversions.c b/src/intel/compiler/brw_nir_lower_conversions.c
index 1c23b51a099..f3bd4b348c6 100644
--- a/src/intel/compiler/brw_nir_lower_conversions.c
+++ b/src/intel/compiler/brw_nir_lower_conversions.c
@@ -21,7 +21,7 @@
  * IN THE SOFTWARE.
  */
 
-#include "brw_nir.h"
+#include "intel_nir.h"
 #include "compiler/nir/nir_builder.h"
 
 static void
diff --git a/src/intel/compiler/brw_nir_lower_non_uniform_barycentric_at_sample.c b/src/intel/compiler/brw_nir_lower_non_uniform_barycentric_at_sample.c
index 12cd607f7f1..dde5ebc4912 100644
--- a/src/intel/compiler/brw_nir_lower_non_uniform_barycentric_at_sample.c
+++ b/src/intel/compiler/brw_nir_lower_non_uniform_barycentric_at_sample.c
@@ -29,7 +29,7 @@
  * can assume divergence analysis here.
  */
 
-#include "brw_nir.h"
+#include "intel_nir.h"
 #include "compiler/nir/nir_builder.h"
 
 static bool
diff --git a/src/intel/compiler/brw_nir_lower_non_uniform_resource_intel.c b/src/intel/compiler/brw_nir_lower_non_uniform_resource_intel.c
index c4f0dc64662..dc90ecb2434 100644
--- a/src/intel/compiler/brw_nir_lower_non_uniform_resource_intel.c
+++ b/src/intel/compiler/brw_nir_lower_non_uniform_resource_intel.c
@@ -24,7 +24,7 @@
 #include "compiler/nir/nir_builder.h"
 #include "util/u_dynarray.h"
 
-#include "brw_nir.h"
+#include "intel_nir.h"
 
 static bool
 nir_instr_is_resource_intel(nir_instr *instr)
diff --git a/src/intel/compiler/brw_nir_lower_shading_rate_output.c b/src/intel/compiler/brw_nir_lower_shading_rate_output.c
index 199d005f80c..b19c83e26d6 100644
--- a/src/intel/compiler/brw_nir_lower_shading_rate_output.c
+++ b/src/intel/compiler/brw_nir_lower_shading_rate_output.c
@@ -43,7 +43,7 @@
  * This is never the case in our implementation.
  */
 
-#include "brw_nir.h"
+#include "intel_nir.h"
 #include "compiler/nir/nir_builder.h"
 
 static bool
diff --git a/src/intel/compiler/brw_nir_lower_sparse.c b/src/intel/compiler/brw_nir_lower_sparse.c
index 9c923981e4f..2de3b9b153d 100644
--- a/src/intel/compiler/brw_nir_lower_sparse.c
+++ b/src/intel/compiler/brw_nir_lower_sparse.c
@@ -21,7 +21,7 @@
  * IN THE SOFTWARE.
  */
 
-#include "brw_nir.h"
+#include "intel_nir.h"
 #include "compiler/nir/nir_builder.h"
 
 /*
diff --git a/src/intel/compiler/brw_nir_lower_texture.c b/src/intel/compiler/brw_nir_lower_texture.c
index 1e564be8f57..1c0ed57f3b1 100644
--- a/src/intel/compiler/brw_nir_lower_texture.c
+++ b/src/intel/compiler/brw_nir_lower_texture.c
@@ -22,7 +22,7 @@
  */
 
 #include "compiler/nir/nir_builder.h"
-#include "brw_nir.h"
+#include "intel_nir.h"
 
 /**
  * Pack either the explicit LOD or LOD bias and the array index together.
diff --git a/src/intel/compiler/brw_nir_opt_peephole_ffma.c b/src/intel/compiler/brw_nir_opt_peephole_ffma.c
index 01838dbc5c0..2411c1bcac9 100644
--- a/src/intel/compiler/brw_nir_opt_peephole_ffma.c
+++ b/src/intel/compiler/brw_nir_opt_peephole_ffma.c
@@ -21,7 +21,7 @@
  * IN THE SOFTWARE.
  */
 
-#include "brw_nir.h"
+#include "intel_nir.h"
 #include "compiler/nir/nir_builder.h"
 
 /*
diff --git a/src/intel/compiler/brw_nir_opt_peephole_imul32x16.c b/src/intel/compiler/brw_nir_opt_peephole_imul32x16.c
index 14962d30ce1..bb2f213515d 100644
--- a/src/intel/compiler/brw_nir_opt_peephole_imul32x16.c
+++ b/src/intel/compiler/brw_nir_opt_peephole_imul32x16.c
@@ -21,7 +21,7 @@
  * IN THE SOFTWARE.
  */
 
-#include "brw_nir.h"
+#include "intel_nir.h"
 #include "compiler/nir/nir_builder.h"
 
 /**
diff --git a/src/intel/compiler/brw_nir_rt.c b/src/intel/compiler/brw_nir_rt.c
index 792c39b9129..992a45d1f52 100644
--- a/src/intel/compiler/brw_nir_rt.c
+++ b/src/intel/compiler/brw_nir_rt.c
@@ -23,6 +23,7 @@
 
 #include "brw_nir_rt.h"
 #include "brw_nir_rt_builder.h"
+#include "intel_nir.h"
 
 static bool
 resize_deref(nir_builder *b, nir_deref_instr *deref,
diff --git a/src/intel/compiler/brw_nir_tcs_workarounds.c b/src/intel/compiler/brw_nir_tcs_workarounds.c
index 11facb5ab0e..6dc045abf2d 100644
--- a/src/intel/compiler/brw_nir_tcs_workarounds.c
+++ b/src/intel/compiler/brw_nir_tcs_workarounds.c
@@ -22,7 +22,7 @@
  */
 
 #include "compiler/nir/nir_builder.h"
-#include "brw_nir.h"
+#include "intel_nir.h"
 
 /**
  * Implements the WaPreventHSTessLevelsInterference workaround (for Gfx7-8).
diff --git a/src/intel/compiler/brw_vec4_tcs.cpp b/src/intel/compiler/brw_vec4_tcs.cpp
index 0a2bacb2d0f..2236bd1f309 100644
--- a/src/intel/compiler/brw_vec4_tcs.cpp
+++ b/src/intel/compiler/brw_vec4_tcs.cpp
@@ -27,6 +27,7 @@
  * Tessellaton control shader specific code derived from the vec4_visitor class.
  */
 
+#include "intel_nir.h"
 #include "brw_nir.h"
 #include "brw_vec4_tcs.h"
 #include "brw_fs.h"
diff --git a/src/intel/compiler/intel_nir.c b/src/intel/compiler/intel_nir.c
new file mode 100644
index 00000000000..4d42c863654
--- /dev/null
+++ b/src/intel/compiler/intel_nir.c
@@ -0,0 +1,28 @@
+/*
+ * Copyright (c) 2014-2023 Intel Corporation
+ * SPDX-License-Identifier: MIT
+ */
+
+#include "intel_nir.h"
+
+bool
+brw_nir_pulls_at_sample(nir_shader *shader)
+{
+   nir_foreach_function_impl(impl, shader) {
+      nir_foreach_block(block, impl) {
+         nir_foreach_instr(instr, block) {
+            if (instr->type != nir_instr_type_intrinsic)
+               continue;
+
+            nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
+
+            if (intrin->intrinsic == nir_intrinsic_load_barycentric_at_sample)
+               return true;
+         }
+      }
+   }
+
+   return false;
+}
+
+
diff --git a/src/intel/compiler/intel_nir.h b/src/intel/compiler/intel_nir.h
new file mode 100644
index 00000000000..8b736168176
--- /dev/null
+++ b/src/intel/compiler/intel_nir.h
@@ -0,0 +1,43 @@
+/*
+ * Copyright (c) 2015-2023 Intel Corporation
+ * SPDX-License-Identifier: MIT
+ */
+
+#ifndef INTEL_NIR_H
+#define INTEL_NIR_H
+
+#include "nir.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+struct intel_device_info;
+
+bool brw_nir_lower_conversions(nir_shader *nir);
+bool brw_nir_lower_shading_rate_output(nir_shader *nir);
+bool brw_nir_lower_sparse_intrinsics(nir_shader *nir);
+bool brw_nir_lower_non_uniform_resource_intel(nir_shader *shader);
+bool brw_nir_cleanup_resource_intel(nir_shader *shader);
+bool brw_nir_clamp_image_1d_2d_array_sizes(nir_shader *shader);
+void brw_nir_apply_tcs_quads_workaround(nir_shader *nir);
+bool brw_nir_lower_non_uniform_barycentric_at_sample(nir_shader *nir);
+bool brw_nir_opt_peephole_ffma(nir_shader *shader);
+bool brw_nir_opt_peephole_imul32x16(nir_shader *shader);
+bool brw_nir_clamp_per_vertex_loads(nir_shader *shader);
+bool brw_nir_lower_patch_vertices_in(nir_shader *shader, unsigned input_vertices);
+bool brw_nir_blockify_uniform_loads(nir_shader *shader,
+                                    const struct intel_device_info *devinfo);
+bool brw_nir_pulls_at_sample(nir_shader *shader);
+
+struct brw_nir_lower_texture_opts {
+   bool combined_lod_and_array_index;
+};
+bool brw_nir_lower_texture(nir_shader *nir,
+                           const struct brw_nir_lower_texture_opts *opts);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* INTEL_NIR_H */
diff --git a/src/intel/compiler/meson.build b/src/intel/compiler/meson.build
index 896f8599fda..595178b9816 100644
--- a/src/intel/compiler/meson.build
+++ b/src/intel/compiler/meson.build
@@ -18,6 +18,24 @@
 # OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 # SOFTWARE.
 
+intel_nir_files = files(
+  'intel_nir.h',
+  'intel_nir.c',
+
+  'brw_nir_blockify_uniform_loads.c',
+  'brw_nir_clamp_image_1d_2d_array_sizes.c',
+  'brw_nir_clamp_per_vertex_loads.c',
+  'brw_nir_lower_conversions.c',
+  'brw_nir_lower_non_uniform_barycentric_at_sample.c',
+  'brw_nir_lower_non_uniform_resource_intel.c',
+  'brw_nir_lower_shading_rate_output.c',
+  'brw_nir_lower_sparse.c',
+  'brw_nir_lower_texture.c',
+  'brw_nir_opt_peephole_ffma.c',
+  'brw_nir_opt_peephole_imul32x16.c',
+  'brw_nir_tcs_workarounds.c',
+)
+
 libintel_compiler_files = files(
   'brw_cfg.cpp',
   'brw_cfg.h',
@@ -86,29 +104,17 @@ libintel_compiler_files = files(
   'brw_nir_analyze_boolean_resolves.c',
   'brw_nir_analyze_ubo_ranges.c',
   'brw_nir_attribute_workarounds.c',
-  'brw_nir_blockify_uniform_loads.c',
-  'brw_nir_clamp_per_vertex_loads.c',
-  'brw_nir_lower_conversions.c',
   'brw_nir_lower_cooperative_matrix.c',
   'brw_nir_lower_cs_intrinsics.c',
   'brw_nir_lower_alpha_to_coverage.c',
   'brw_nir_lower_intersection_shader.c',
-  'brw_nir_lower_non_uniform_resource_intel.c',
-  'brw_nir_lower_non_uniform_barycentric_at_sample.c',
   'brw_nir_lower_ray_queries.c',
   'brw_nir_lower_rt_intrinsics.c',
   'brw_nir_lower_shader_calls.c',
-  'brw_nir_lower_shading_rate_output.c',
-  'brw_nir_lower_sparse.c',
   'brw_nir_lower_storage_image.c',
-  'brw_nir_lower_texture.c',
-  'brw_nir_opt_peephole_ffma.c',
-  'brw_nir_opt_peephole_imul32x16.c',
   'brw_nir_rt.h',
   'brw_nir_rt.c',
   'brw_nir_rt_builder.h',
-  'brw_nir_tcs_workarounds.c',
-  'brw_nir_clamp_image_1d_2d_array_sizes.c',
   'brw_packed_float.c',
   'brw_predicated_break.cpp',
   'brw_prim.h',
@@ -169,7 +175,7 @@ brw_nir_trig = custom_target(
 
 libintel_compiler = static_library(
   'intel_compiler',
-  [libintel_compiler_files, brw_nir_trig, ir_expression_operation_h, [brw_device_sha1_gen_src]],
+  [libintel_compiler_files, intel_nir_files, brw_nir_trig, ir_expression_operation_h, [brw_device_sha1_gen_src]],
   include_directories : [inc_include, inc_src, inc_intel],
   c_args : [no_override_init_args],
   gnu_symbol_visibility : 'hidden',
diff --git a/src/intel/vulkan/anv_internal_kernels.c b/src/intel/vulkan/anv_internal_kernels.c
index 67df65b6fb8..f68d8a50d0e 100644
--- a/src/intel/vulkan/anv_internal_kernels.c
+++ b/src/intel/vulkan/anv_internal_kernels.c
@@ -28,6 +28,7 @@
 #include "compiler/nir/nir.h"
 #include "compiler/nir/nir_builder.h"
 #include "dev/intel_debug.h"
+#include "intel/compiler/intel_nir.h"
 #include "util/macros.h"
 
 #include "vk_nir.h"
diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipeline.c
index 1fd4957818c..f523b39a3f5 100644
--- a/src/intel/vulkan/anv_pipeline.c
+++ b/src/intel/vulkan/anv_pipeline.c
@@ -35,6 +35,7 @@
 #include "anv_private.h"
 #include "compiler/brw_nir.h"
 #include "compiler/brw_nir_rt.h"
+#include "compiler/intel_nir.h"
 #include "anv_nir.h"
 #include "nir/nir_xfb_info.h"
 #include "spirv/nir_spirv.h"
diff --git a/src/intel/vulkan_hasvk/anv_pipeline.c b/src/intel/vulkan_hasvk/anv_pipeline.c
index f85ce50d041..e6b69be12a4 100644
--- a/src/intel/vulkan_hasvk/anv_pipeline.c
+++ b/src/intel/vulkan_hasvk/anv_pipeline.c
@@ -33,7 +33,7 @@
 #include "common/intel_sample_positions.h"
 #include "compiler/brw_disasm.h"
 #include "anv_private.h"
-#include "compiler/brw_nir.h"
+#include "compiler/intel_nir.h"
 #include "compiler/brw_nir_rt.h"
 #include "anv_nir.h"
 #include "nir/nir_xfb_info.h"