From d987d5e341a43dd1704cd04a6b90a1317b9fa074 Mon Sep 17 00:00:00 2001 From: Rhys Perry Date: Wed, 23 Apr 2025 17:06:31 +0100 Subject: [PATCH] aco/gfx12: increase maximum global/scratch offset fossil-db (gfx1201): Totals from 29 (0.04% of 79377) affected shaders: Instrs: 1439082 -> 1439070 (-0.00%) CodeSize: 7641688 -> 7641608 (-0.00%) Latency: 9836296 -> 9836280 (-0.00%) VALU: 799504 -> 799496 (-0.00%) Signed-off-by: Rhys Perry Reviewed-by: Georg Lehmann Part-of: --- src/amd/compiler/aco_ir.cpp | 5 ++++- src/amd/compiler/aco_ir.h | 15 +++++++-------- src/amd/compiler/aco_opcodes.py | 2 +- 3 files changed, 12 insertions(+), 10 deletions(-) diff --git a/src/amd/compiler/aco_ir.cpp b/src/amd/compiler/aco_ir.cpp index ecfecd30837..5dcef374a35 100644 --- a/src/amd/compiler/aco_ir.cpp +++ b/src/amd/compiler/aco_ir.cpp @@ -168,7 +168,10 @@ init_program(Program* program, Stage stage, const struct aco_shader_info* info, program->family == CHIP_MI100 || program->family == CHIP_MI200) program->dev.fused_mad_mix = true; - if (program->gfx_level >= GFX11) { + if (program->gfx_level >= GFX12) { + program->dev.scratch_global_offset_min = -8388608; + program->dev.scratch_global_offset_max = 8388607; + } else if (program->gfx_level >= GFX11) { program->dev.scratch_global_offset_min = -4096; program->dev.scratch_global_offset_max = 4095; } else if (program->gfx_level >= GFX10 || program->gfx_level == GFX8) { diff --git a/src/amd/compiler/aco_ir.h b/src/amd/compiler/aco_ir.h index b2579db1480..f1371fb9f4a 100644 --- a/src/amd/compiler/aco_ir.h +++ b/src/amd/compiler/aco_ir.h @@ -1699,12 +1699,11 @@ static_assert(sizeof(MIMG_instruction) == sizeof(Instruction) + 8, "Unexpected p struct FLAT_instruction : public Instruction { memory_sync_info sync; ac_hw_cache_flags cache; - bool lds : 1; - bool nv : 1; - bool disable_wqm : 1; /* Require an exec mask without helper invocations */ - uint8_t padding0 : 5; - uint8_t padding1; - int16_t offset; /* Vega/Navi only */ + int32_t offset : 24; + uint32_t lds : 1; + uint32_t nv : 1; + uint32_t disable_wqm : 1; /* Require an exec mask without helper invocations */ + uint32_t padding0 : 5; }; static_assert(sizeof(FLAT_instruction) == sizeof(Instruction) + 8, "Unexpected padding"); @@ -2102,8 +2101,8 @@ struct DeviceInfo { bool xnack_enabled = false; bool sram_ecc_enabled = false; - int16_t scratch_global_offset_min; - int16_t scratch_global_offset_max; + int32_t scratch_global_offset_min; + int32_t scratch_global_offset_max; unsigned max_nsa_vgprs; /* Note that GFX6/7 ignore the low 2 bits and this is only for positive offsets. */ diff --git a/src/amd/compiler/aco_opcodes.py b/src/amd/compiler/aco_opcodes.py index 95416bc844a..6edbb26d724 100644 --- a/src/amd/compiler/aco_opcodes.py +++ b/src/amd/compiler/aco_opcodes.py @@ -184,7 +184,7 @@ class Format(IntEnum): return [('uint8_t', 'opsel', 0), ('unsigned', 'wait_exp', 7)] elif self in [Format.FLAT, Format.GLOBAL, Format.SCRATCH]: - return [('int16_t', 'offset', 0), + return [('int32_t', 'offset', 0), ('memory_sync_info', 'sync', 'memory_sync_info()'), ('ac_hw_cache_flags', 'cache', '{{0, 0, 0, 0, 0}}'), ('bool', 'lds', 'false'),