From d94bea85b898f81b158f0ca263609c1795e03022 Mon Sep 17 00:00:00 2001 From: Job Noorman Date: Thu, 26 Jun 2025 11:35:55 +0200 Subject: [PATCH] ir3: make backend aware of movs Signed-off-by: Job Noorman Part-of: --- src/freedreno/ir3/ir3.c | 8 ++++++++ src/freedreno/ir3/ir3_validate.c | 6 +++++- 2 files changed, 13 insertions(+), 1 deletion(-) diff --git a/src/freedreno/ir3/ir3.c b/src/freedreno/ir3/ir3.c index b45738636cb..bc1919736d4 100644 --- a/src/freedreno/ir3/ir3.c +++ b/src/freedreno/ir3/ir3.c @@ -1246,6 +1246,7 @@ is_scalar_alu(struct ir3_instruction *instr, return instr->opc != OPC_MOVMSK && instr->opc != OPC_SCAN_CLUSTERS_MACRO && instr->opc != OPC_SCAN_MACRO && + instr->opc != OPC_MOVS && is_alu(instr) && (instr->dsts[0]->flags & IR3_REG_SHARED) && /* scalar->scalar mov instructions (but NOT cov) were supported before the * scalar ALU was supported, but they still required (ss) whereas on GPUs @@ -1577,6 +1578,13 @@ ir3_valid_flags(struct ir3_instruction *instr, unsigned n, unsigned flags) else return flags == 0; break; + case OPC_MOVS: + if (n == 0) { + valid_flags = IR3_REG_SHARED; + } else { + valid_flags = IR3_REG_IMMED; + } + break; default: { valid_flags = IR3_REG_IMMED | IR3_REG_CONST | IR3_REG_RELATIV | IR3_REG_SHARED; diff --git a/src/freedreno/ir3/ir3_validate.c b/src/freedreno/ir3/ir3_validate.c index 3db61a8cfc6..0a14a6b6c56 100644 --- a/src/freedreno/ir3/ir3_validate.c +++ b/src/freedreno/ir3/ir3_validate.c @@ -354,6 +354,10 @@ validate_instr(struct ir3_validate_ctx *ctx, struct ir3_instruction *instr) validate_assert(ctx, reg_class_flags(instr->dsts[instr->dsts_count - 1]) == reg_class_flags(instr->srcs[1])); + } else if (instr->opc == OPC_MOVS) { + validate_assert(ctx, instr->dsts[0]->flags & IR3_REG_SHARED); + validate_reg_size(ctx, instr->dsts[0], instr->cat1.dst_type); + validate_reg_size(ctx, instr->srcs[0], instr->cat1.src_type); } else { foreach_dst (dst, instr) validate_reg_size(ctx, dst, instr->cat1.dst_type); @@ -380,7 +384,7 @@ validate_instr(struct ir3_validate_ctx *ctx, struct ir3_instruction *instr) } } - if (instr->opc != OPC_MOV) + if (instr->opc != OPC_MOV && instr->opc != OPC_MOVS) validate_assert(ctx, !instr->address); break;