diff --git a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c
index e3e4708ee31..7e6c35b7807 100644
--- a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c
+++ b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c
@@ -805,30 +805,12 @@ radv_amdgpu_cs_execute_ib(struct radeon_cmdbuf *_cs, struct radeon_winsys_bo *bo
       return;
 
    assert(ib_va && ib_va % cs->ws->info.ip[cs->hw_ip].ib_alignment == 0);
+   assert(cs->hw_ip == AMD_IP_GFX && cdw <= ~C_3F2_IB_SIZE);
 
-   if (cs->hw_ip == AMD_IP_GFX && cs->use_ib) {
-      assert(cdw <= ~C_3F2_IB_SIZE);
-
-      radeon_emit(&cs->base, PKT3(PKT3_INDIRECT_BUFFER, 2, predicate));
-      radeon_emit(&cs->base, ib_va);
-      radeon_emit(&cs->base, ib_va >> 32);
-      radeon_emit(&cs->base, cdw);
-   } else {
-      const uint32_t ib_size = radv_amdgpu_cs_get_initial_size(cs->ws, cs->hw_ip);
-      VkResult result;
-
-      /* Finalize the current CS without chaining to execute the external IB. */
-      radv_amdgpu_cs_finalize(_cs);
-
-      radv_amdgpu_cs_add_ib_buffer(cs, bo, ib_va, cdw);
-
-      /* Start a new CS which isn't chained to any previous CS. */
-      result = radv_amdgpu_cs_get_new_ib(_cs, ib_size);
-      if (result != VK_SUCCESS) {
-         cs->base.cdw = 0;
-         cs->status = result;
-      }
-   }
+   radeon_emit(&cs->base, PKT3(PKT3_INDIRECT_BUFFER, 2, predicate));
+   radeon_emit(&cs->base, ib_va);
+   radeon_emit(&cs->base, ib_va >> 32);
+   radeon_emit(&cs->base, cdw);
 }
 
 static void