diff --git a/src/intel/vulkan/anv_blorp.c b/src/intel/vulkan/anv_blorp.c index 406c8981725..8751dc044be 100644 --- a/src/intel/vulkan/anv_blorp.c +++ b/src/intel/vulkan/anv_blorp.c @@ -170,7 +170,7 @@ anv_blorp_batch_finish(struct blorp_batch *batch) static isl_surf_usage_flags_t get_usage_flag_for_cmd_buffer(const struct anv_cmd_buffer *cmd_buffer, - bool is_dest) + bool is_dest, bool protected) { isl_surf_usage_flags_t usage; @@ -191,6 +191,9 @@ get_usage_flag_for_cmd_buffer(const struct anv_cmd_buffer *cmd_buffer, unreachable("Unhandled engine class"); } + if (protected) + usage |= ISL_SURF_USAGE_PROTECTED_BIT; + return usage; } @@ -199,13 +202,13 @@ get_blorp_surf_for_anv_address(struct anv_cmd_buffer *cmd_buffer, struct anv_address address, uint32_t width, uint32_t height, uint32_t row_pitch, enum isl_format format, - bool is_dest, + bool is_dest, bool protected, struct blorp_surf *blorp_surf, struct isl_surf *isl_surf) { bool ok UNUSED; isl_surf_usage_flags_t usage = - get_usage_flag_for_cmd_buffer(cmd_buffer, is_dest); + get_usage_flag_for_cmd_buffer(cmd_buffer, is_dest, protected); *blorp_surf = (struct blorp_surf) { .surf = isl_surf, @@ -243,7 +246,8 @@ get_blorp_surf_for_anv_buffer(struct anv_cmd_buffer *cmd_buffer, get_blorp_surf_for_anv_address(cmd_buffer, anv_address_add(buffer->address, offset), width, height, row_pitch, format, - is_dest, blorp_surf, isl_surf); + is_dest, anv_buffer_is_protected(buffer), + blorp_surf, isl_surf); } /* Pick something high enough that it won't be used in core and low enough it @@ -281,7 +285,8 @@ get_blorp_surf_for_anv_image(const struct anv_cmd_buffer *cmd_buffer, isl_surf_usage_flags_t isl_usage = get_usage_flag_for_cmd_buffer(cmd_buffer, - usage & VK_IMAGE_USAGE_TRANSFER_DST_BIT); + usage & VK_IMAGE_USAGE_TRANSFER_DST_BIT, + anv_image_is_protected(image)); const struct anv_surface *surface = &image->planes[plane].primary_surface; const struct anv_address address = anv_image_address(image, &surface->memory_range); @@ -1121,14 +1126,17 @@ void anv_CmdUpdateBuffer( .offset = tmp_addr.offset, .mocs = anv_mocs(cmd_buffer->device, NULL, get_usage_flag_for_cmd_buffer(cmd_buffer, - false /* is_dest */)), + false /* is_dest */, + false /* protected */)), }; struct blorp_address dst = { .buffer = dst_buffer->address.bo, .offset = dst_buffer->address.offset + dstOffset, .mocs = anv_mocs(cmd_buffer->device, dst_buffer->address.bo, - get_usage_flag_for_cmd_buffer(cmd_buffer, - true /* is_dest */)), + get_usage_flag_for_cmd_buffer( + cmd_buffer, + true /* is_dest */, + anv_buffer_is_protected(dst_buffer))), }; blorp_buffer_copy(&batch, src, dst, copy_size); @@ -1147,7 +1155,8 @@ void anv_cmd_buffer_fill_area(struct anv_cmd_buffer *cmd_buffer, struct anv_address address, VkDeviceSize size, - uint32_t data) + uint32_t data, + bool protected) { struct blorp_surf surf; struct isl_surf isl_surf; @@ -1179,7 +1188,7 @@ anv_cmd_buffer_fill_area(struct anv_cmd_buffer *cmd_buffer, }, MAX_SURFACE_DIM, MAX_SURFACE_DIM, MAX_SURFACE_DIM * bs, isl_format, - true /* is_dest */, + true /* is_dest */, protected, &surf, &isl_surf); blorp_clear(&batch, &surf, isl_format, ISL_SWIZZLE_IDENTITY, @@ -1199,7 +1208,7 @@ anv_cmd_buffer_fill_area(struct anv_cmd_buffer *cmd_buffer, }, MAX_SURFACE_DIM, height, MAX_SURFACE_DIM * bs, isl_format, - true /* is_dest */, + true /* is_dest */, protected, &surf, &isl_surf); blorp_clear(&batch, &surf, isl_format, ISL_SWIZZLE_IDENTITY, @@ -1217,7 +1226,7 @@ anv_cmd_buffer_fill_area(struct anv_cmd_buffer *cmd_buffer, }, width, 1, width * bs, isl_format, - true /* is_dest */, + true /* is_dest */, protected, &surf, &isl_surf); blorp_clear(&batch, &surf, isl_format, ISL_SWIZZLE_IDENTITY, @@ -1252,7 +1261,8 @@ void anv_CmdFillBuffer( anv_cmd_buffer_fill_area(cmd_buffer, anv_address_add(dst_buffer->address, dstOffset), - fillSize, data); + fillSize, data, + anv_buffer_is_protected(dst_buffer)); anv_add_buffer_write_pending_bits(cmd_buffer, "after fill buffer"); } diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h index 582bb3ff46b..20c23f1b8f8 100644 --- a/src/intel/vulkan/anv_private.h +++ b/src/intel/vulkan/anv_private.h @@ -3280,6 +3280,12 @@ struct anv_buffer { struct anv_sparse_binding_data sparse_data; }; +static inline bool +anv_buffer_is_protected(const struct anv_buffer *buffer) +{ + return buffer->vk.create_flags & VK_BUFFER_CREATE_PROTECTED_BIT; +} + static inline bool anv_buffer_is_sparse(const struct anv_buffer *buffer) { @@ -5342,6 +5348,12 @@ struct anv_image { struct list_head link; }; +static inline bool +anv_image_is_protected(const struct anv_image *image) +{ + return image->vk.create_flags & VK_IMAGE_CREATE_PROTECTED_BIT; +} + static inline bool anv_image_is_sparse(const struct anv_image *image) { @@ -5710,7 +5722,8 @@ void anv_cmd_buffer_fill_area(struct anv_cmd_buffer *cmd_buffer, struct anv_address address, VkDeviceSize size, - uint32_t data); + uint32_t data, + bool protected); VkResult anv_cmd_buffer_ensure_rcs_companion(struct anv_cmd_buffer *cmd_buffer); diff --git a/src/intel/vulkan/genX_query.c b/src/intel/vulkan/genX_query.c index 39b3a284b01..02fad8f4508 100644 --- a/src/intel/vulkan/genX_query.c +++ b/src/intel/vulkan/genX_query.c @@ -799,15 +799,18 @@ void genX(CmdResetQueryPool)( ANV_FROM_HANDLE(anv_query_pool, pool, queryPool); struct anv_physical_device *pdevice = cmd_buffer->device->physical; - /* Shader clearing is only possible on render/compute */ + /* Shader clearing is only possible on render/compute when not in protected + * mode. + */ if (anv_cmd_buffer_is_render_or_compute_queue(cmd_buffer) && + (cmd_buffer->vk.pool->flags & VK_COMMAND_POOL_CREATE_PROTECTED_BIT) != 0 && queryCount >= pdevice->instance->query_clear_with_blorp_threshold) { trace_intel_begin_query_clear_blorp(&cmd_buffer->trace); anv_cmd_buffer_fill_area(cmd_buffer, anv_query_address(pool, firstQuery), queryCount * pool->stride, - 0); + 0, false); /* The pending clearing writes are in compute if we're in gpgpu mode on * the render engine or on the compute engine.