diff --git a/src/nouveau/compiler/nak/ir.rs b/src/nouveau/compiler/nak/ir.rs
index 6075337e1b6..3771b103b45 100644
--- a/src/nouveau/compiler/nak/ir.rs
+++ b/src/nouveau/compiler/nak/ir.rs
@@ -5665,38 +5665,6 @@ impl Instr {
         self.op.is_uniform()
     }
 
-    pub fn can_be_uniform(&self, sm: u8) -> bool {
-        match &self.op {
-            Op::R2UR(_)
-            | Op::S2R(_)
-            | Op::BMsk(_)
-            | Op::BRev(_)
-            | Op::Flo(_)
-            | Op::IAdd3(_)
-            | Op::IAdd3X(_)
-            | Op::IMad(_)
-            | Op::IMad64(_)
-            | Op::ISetP(_)
-            | Op::Lop3(_)
-            | Op::Mov(_)
-            | Op::PLop3(_)
-            | Op::PopC(_)
-            | Op::Prmt(_)
-            | Op::PSetP(_)
-            | Op::Sel(_)
-            | Op::Shf(_)
-            | Op::Shl(_)
-            | Op::Shr(_)
-            | Op::Vote(_)
-            | Op::Copy(_)
-            | Op::Pin(_)
-            | Op::Unpin(_) => sm >= 75,
-            Op::Ldc(op) => sm >= 75 && op.offset.is_zero(),
-            // UCLEA  USHL  USHR
-            _ => false,
-        }
-    }
-
     pub fn has_fixed_latency(&self, _sm: u8) -> bool {
         match &self.op {
             // Float ALU
@@ -6281,6 +6249,8 @@ pub struct ShaderInfo {
 pub trait ShaderModel {
     fn sm(&self) -> u8;
     fn num_regs(&self, file: RegFile) -> u32;
+
+    fn op_can_be_uniform(&self, op: &Op) -> bool;
 }
 
 pub struct Shader<'a> {
diff --git a/src/nouveau/compiler/nak/opt_uniform_instrs.rs b/src/nouveau/compiler/nak/opt_uniform_instrs.rs
index d85e4765c21..2ef0b8dc9b4 100644
--- a/src/nouveau/compiler/nak/opt_uniform_instrs.rs
+++ b/src/nouveau/compiler/nak/opt_uniform_instrs.rs
@@ -9,7 +9,7 @@ fn should_lower_to_warp(
     instr: &Instr,
     r2ur: &HashMap<SSAValue, SSAValue>,
 ) -> bool {
-    if !instr.can_be_uniform(sm.sm()) {
+    if !sm.op_can_be_uniform(&instr.op) {
         return true;
     }
 
diff --git a/src/nouveau/compiler/nak/sm50.rs b/src/nouveau/compiler/nak/sm50.rs
index 764b95f5caf..d7ad43dac44 100644
--- a/src/nouveau/compiler/nak/sm50.rs
+++ b/src/nouveau/compiler/nak/sm50.rs
@@ -34,6 +34,10 @@ impl ShaderModel for ShaderModel50 {
             RegFile::Mem => RegRef::MAX_IDX + 1,
         }
     }
+
+    fn op_can_be_uniform(&self, _op: &Op) -> bool {
+        false
+    }
 }
 
 impl Src {
diff --git a/src/nouveau/compiler/nak/sm70.rs b/src/nouveau/compiler/nak/sm70.rs
index 87a151a21f0..8221e3a882a 100644
--- a/src/nouveau/compiler/nak/sm70.rs
+++ b/src/nouveau/compiler/nak/sm70.rs
@@ -55,6 +55,42 @@ impl ShaderModel for ShaderModel70 {
             RegFile::Mem => RegRef::MAX_IDX + 1,
         }
     }
+
+    fn op_can_be_uniform(&self, op: &Op) -> bool {
+        if !self.has_uniform_alu() {
+            return false;
+        }
+
+        match op {
+            Op::R2UR(_)
+            | Op::S2R(_)
+            | Op::BMsk(_)
+            | Op::BRev(_)
+            | Op::Flo(_)
+            | Op::IAdd3(_)
+            | Op::IAdd3X(_)
+            | Op::IMad(_)
+            | Op::IMad64(_)
+            | Op::ISetP(_)
+            | Op::Lop3(_)
+            | Op::Mov(_)
+            | Op::PLop3(_)
+            | Op::PopC(_)
+            | Op::Prmt(_)
+            | Op::PSetP(_)
+            | Op::Sel(_)
+            | Op::Shf(_)
+            | Op::Shl(_)
+            | Op::Shr(_)
+            | Op::Vote(_)
+            | Op::Copy(_)
+            | Op::Pin(_)
+            | Op::Unpin(_) => true,
+            Op::Ldc(op) => op.offset.is_zero(),
+            // UCLEA  USHL  USHR
+            _ => false,
+        }
+    }
 }
 
 struct ALURegRef {