treewide: use VARYING_BIT_*
Via Coccinelle patch generated by the following Python:
varys = [ "POS", "COL0", "COL1", "FOGC", "TEX0", "TEX1", "TEX2", "TEX3", "TEX4",
"TEX5", "TEX6", "TEX7", "PSIZ", "BFC0", "BFC1", "EDGE", "CLIP_VERTEX",
"CLIP_DIST0", "CLIP_DIST1", "CULL_DIST0", "CULL_DIST1", "PRIMITIVE_ID",
"PRIMITIVE_COUNT", "LAYER", "VIEWPORT", "FACE",
"PRIMITIVE_SHADING_RATE", "PNTC", "TESS_LEVEL_OUTER",
"TESS_LEVEL_INNER", "PRIMITIVE_INDICES", "BOUNDING_BOX0",
"BOUNDING_BOX1", "VIEWPORT_MASK", "CULL_PRIMITIVE" ]
t = """
@@
@@
-(1 << VARYING_SLOT_${V})
+VARYING_BIT_${V}
@@
@@
-BITFIELD_BIT(VARYING_SLOT_${V})
+VARYING_BIT_${V}
@@
@@
-(1ull << VARYING_SLOT_${V})
+VARYING_BIT_${V}
@@
@@
-BITFIELD64_BIT(VARYING_SLOT_${V})
+VARYING_BIT_${V}
"""
for v in varys:
from mako.template import Template
print(Template(t).render(V = v))
Closes: #13453
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com> [panfrost, common]
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com> [broadcom]
Reviewed-by: Corentin Noël <corentin.noel@collabora.com> [virgl]
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com> [zink]
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35917>
This commit is contained in:
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Marge Bot
parent
956d3f1562
commit
d31cb824df
@@ -826,7 +826,7 @@ v3d_vs_set_prog_data(struct v3d_compile *c,
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prog_data->vpm_input_size++;
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prog_data->writes_psiz =
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c->s->info.outputs_written & (1 << VARYING_SLOT_PSIZ);
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c->s->info.outputs_written & VARYING_BIT_PSIZ;
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/* Input/output segment size are in sectors (8 rows of 32 bits per
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* channel).
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@@ -905,7 +905,7 @@ v3d_gs_set_prog_data(struct v3d_compile *c,
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prog_data->num_invocations = c->s->info.gs.invocations;
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prog_data->writes_psiz =
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c->s->info.outputs_written & (1 << VARYING_SLOT_PSIZ);
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c->s->info.outputs_written & VARYING_BIT_PSIZ;
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}
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static void
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@@ -355,9 +355,8 @@ get_clear_rect_gs(const nir_shader_compiler_options *options,
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nir_builder b = nir_builder_init_simple_shader(MESA_SHADER_GEOMETRY, options,
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"meta clear gs");
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nir_shader *nir = b.shader;
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nir->info.inputs_read = 1ull << VARYING_SLOT_POS;
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nir->info.outputs_written = (1ull << VARYING_SLOT_POS) |
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(1ull << VARYING_SLOT_LAYER);
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nir->info.inputs_read = VARYING_BIT_POS;
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nir->info.outputs_written = VARYING_BIT_POS | VARYING_BIT_LAYER;
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nir->info.gs.input_primitive = MESA_PRIM_TRIANGLES;
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nir->info.gs.output_primitive = MESA_PRIM_TRIANGLE_STRIP;
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nir->info.gs.vertices_in = 3;
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@@ -2240,9 +2240,9 @@ get_texel_buffer_copy_gs(const nir_shader_compiler_options *options)
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nir_builder b = nir_builder_init_simple_shader(MESA_SHADER_GEOMETRY, options,
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"meta texel buffer copy gs");
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nir_shader *nir = b.shader;
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nir->info.inputs_read = 1ull << VARYING_SLOT_POS;
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nir->info.outputs_written = (1ull << VARYING_SLOT_POS) |
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(1ull << VARYING_SLOT_LAYER);
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nir->info.inputs_read = VARYING_BIT_POS;
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nir->info.outputs_written = VARYING_BIT_POS |
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VARYING_BIT_LAYER;
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nir->info.gs.input_primitive = MESA_PRIM_TRIANGLES;
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nir->info.gs.output_primitive = MESA_PRIM_TRIANGLE_STRIP;
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nir->info.gs.vertices_in = 3;
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@@ -1297,7 +1297,7 @@ pipeline_populate_v3d_gs_key(struct v3d_gs_key *key,
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struct v3dv_pipeline *pipeline = p_stage->pipeline;
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key->per_vertex_point_size =
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p_stage->nir->info.outputs_written & (1ull << VARYING_SLOT_PSIZ);
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p_stage->nir->info.outputs_written & VARYING_BIT_PSIZ;
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key->is_coord = broadcom_shader_stage_is_binning(p_stage->stage);
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@@ -1340,7 +1340,7 @@ pipeline_populate_v3d_vs_key(struct v3d_vs_key *key,
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struct v3dv_pipeline *pipeline = p_stage->pipeline;
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key->per_vertex_point_size =
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p_stage->nir->info.outputs_written & (1ull << VARYING_SLOT_PSIZ);
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p_stage->nir->info.outputs_written & VARYING_BIT_PSIZ;
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key->is_coord = broadcom_shader_stage_is_binning(p_stage->stage);
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@@ -2295,8 +2295,7 @@ pipeline_add_multiview_gs(struct v3dv_pipeline *pipeline,
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"multiview broadcast gs");
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nir_shader *nir = b.shader;
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nir->info.inputs_read = vs_nir->info.outputs_written;
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nir->info.outputs_written = vs_nir->info.outputs_written |
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(1ull << VARYING_SLOT_LAYER);
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nir->info.outputs_written = vs_nir->info.outputs_written | VARYING_BIT_LAYER;
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uint32_t vertex_count = mesa_vertices_per_prim(pipeline->topology);
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nir->info.gs.input_primitive =
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