diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index bb62d793f5f..a90100fdb2e 100644 --- a/src/amd/vulkan/radv_pipeline.c +++ b/src/amd/vulkan/radv_pipeline.c @@ -694,17 +694,6 @@ radv_get_shader_from_executable_index(struct radv_pipeline *pipeline, int index, return NULL; } -/* Basically strlcpy (which does not exist on linux) specialized for - * descriptions. */ -static void -desc_copy(char *desc, const char *src) -{ - int len = strlen(src); - assert(len < VK_MAX_DESCRIPTION_SIZE); - memcpy(desc, src, len); - memset(desc + len, 0, VK_MAX_DESCRIPTION_SIZE - len); -} - VKAPI_ATTR VkResult VKAPI_CALL radv_GetPipelineExecutablePropertiesKHR(VkDevice _device, const VkPipelineInfoKHR *pPipelineInfo, uint32_t *pExecutableCount, VkPipelineExecutablePropertiesKHR *pProperties) @@ -796,8 +785,8 @@ radv_GetPipelineExecutablePropertiesKHR(VkDevice _device, const VkPipelineInfoKH } pProperties[executable_idx].subgroupSize = shader->info.wave_size; - desc_copy(pProperties[executable_idx].name, name); - desc_copy(pProperties[executable_idx].description, description); + VK_COPY_STR(pProperties[executable_idx].name, name); + VK_COPY_STR(pProperties[executable_idx].description, description); } VkResult result = *pExecutableCount < total_count ? VK_INCOMPLETE : VK_SUCCESS; @@ -826,80 +815,80 @@ radv_GetPipelineExecutableStatisticsKHR(VkDevice _device, const VkPipelineExecut VkResult result = VK_SUCCESS; if (s < end) { - desc_copy(s->name, "Driver pipeline hash"); - desc_copy(s->description, "Driver pipeline hash used by RGP"); + VK_COPY_STR(s->name, "Driver pipeline hash"); + VK_COPY_STR(s->description, "Driver pipeline hash used by RGP"); s->format = VK_PIPELINE_EXECUTABLE_STATISTIC_FORMAT_UINT64_KHR; s->value.u64 = pipeline->pipeline_hash; } ++s; if (s < end) { - desc_copy(s->name, "SGPRs"); - desc_copy(s->description, "Number of SGPR registers allocated per subgroup"); + VK_COPY_STR(s->name, "SGPRs"); + VK_COPY_STR(s->description, "Number of SGPR registers allocated per subgroup"); s->format = VK_PIPELINE_EXECUTABLE_STATISTIC_FORMAT_UINT64_KHR; s->value.u64 = shader->config.num_sgprs; } ++s; if (s < end) { - desc_copy(s->name, "VGPRs"); - desc_copy(s->description, "Number of VGPR registers allocated per subgroup"); + VK_COPY_STR(s->name, "VGPRs"); + VK_COPY_STR(s->description, "Number of VGPR registers allocated per subgroup"); s->format = VK_PIPELINE_EXECUTABLE_STATISTIC_FORMAT_UINT64_KHR; s->value.u64 = shader->config.num_vgprs; } ++s; if (s < end) { - desc_copy(s->name, "Spilled SGPRs"); - desc_copy(s->description, "Number of SGPR registers spilled per subgroup"); + VK_COPY_STR(s->name, "Spilled SGPRs"); + VK_COPY_STR(s->description, "Number of SGPR registers spilled per subgroup"); s->format = VK_PIPELINE_EXECUTABLE_STATISTIC_FORMAT_UINT64_KHR; s->value.u64 = shader->config.spilled_sgprs; } ++s; if (s < end) { - desc_copy(s->name, "Spilled VGPRs"); - desc_copy(s->description, "Number of VGPR registers spilled per subgroup"); + VK_COPY_STR(s->name, "Spilled VGPRs"); + VK_COPY_STR(s->description, "Number of VGPR registers spilled per subgroup"); s->format = VK_PIPELINE_EXECUTABLE_STATISTIC_FORMAT_UINT64_KHR; s->value.u64 = shader->config.spilled_vgprs; } ++s; if (s < end) { - desc_copy(s->name, "Code size"); - desc_copy(s->description, "Code size in bytes"); + VK_COPY_STR(s->name, "Code size"); + VK_COPY_STR(s->description, "Code size in bytes"); s->format = VK_PIPELINE_EXECUTABLE_STATISTIC_FORMAT_UINT64_KHR; s->value.u64 = shader->exec_size; } ++s; if (s < end) { - desc_copy(s->name, "LDS size"); - desc_copy(s->description, "LDS size in bytes per workgroup"); + VK_COPY_STR(s->name, "LDS size"); + VK_COPY_STR(s->description, "LDS size in bytes per workgroup"); s->format = VK_PIPELINE_EXECUTABLE_STATISTIC_FORMAT_UINT64_KHR; s->value.u64 = shader->config.lds_size * lds_increment; } ++s; if (s < end) { - desc_copy(s->name, "Scratch size"); - desc_copy(s->description, "Private memory in bytes per subgroup"); + VK_COPY_STR(s->name, "Scratch size"); + VK_COPY_STR(s->description, "Private memory in bytes per subgroup"); s->format = VK_PIPELINE_EXECUTABLE_STATISTIC_FORMAT_UINT64_KHR; s->value.u64 = shader->config.scratch_bytes_per_wave; } ++s; if (s < end) { - desc_copy(s->name, "Subgroups per SIMD"); - desc_copy(s->description, "The maximum number of subgroups in flight on a SIMD unit"); + VK_COPY_STR(s->name, "Subgroups per SIMD"); + VK_COPY_STR(s->description, "The maximum number of subgroups in flight on a SIMD unit"); s->format = VK_PIPELINE_EXECUTABLE_STATISTIC_FORMAT_UINT64_KHR; s->value.u64 = shader->max_waves; } ++s; if (s < end) { - desc_copy(s->name, "Combined inputs"); - desc_copy(s->description, "Number of input slots reserved for the shader (including merged stages)"); + VK_COPY_STR(s->name, "Combined inputs"); + VK_COPY_STR(s->description, "Number of input slots reserved for the shader (including merged stages)"); s->format = VK_PIPELINE_EXECUTABLE_STATISTIC_FORMAT_UINT64_KHR; s->value.u64 = 0; @@ -959,8 +948,8 @@ radv_GetPipelineExecutableStatisticsKHR(VkDevice _device, const VkPipelineExecut ++s; if (s < end) { - desc_copy(s->name, "Combined outputs"); - desc_copy(s->description, "Number of output slots reserved for the shader (including merged stages)"); + VK_COPY_STR(s->name, "Combined outputs"); + VK_COPY_STR(s->description, "Number of output slots reserved for the shader (including merged stages)"); s->format = VK_PIPELINE_EXECUTABLE_STATISTIC_FORMAT_UINT64_KHR; s->value.u64 = 0; @@ -1045,8 +1034,8 @@ radv_GetPipelineExecutableStatisticsKHR(VkDevice _device, const VkPipelineExecut for (unsigned i = 0; i < aco_num_statistics; i++) { const struct aco_compiler_statistic_info *info = &aco_statistic_infos[i]; if (s < end) { - desc_copy(s->name, info->name); - desc_copy(s->description, info->desc); + VK_COPY_STR(s->name, info->name); + VK_COPY_STR(s->description, info->desc); s->format = VK_PIPELINE_EXECUTABLE_STATISTIC_FORMAT_UINT64_KHR; s->value.u64 = shader->statistics[i]; } @@ -1103,8 +1092,8 @@ radv_GetPipelineExecutableInternalRepresentationsKHR( /* optimized NIR */ if (p < end) { p->isText = true; - desc_copy(p->name, "NIR Shader(s)"); - desc_copy(p->description, "The optimized NIR shader(s)"); + VK_COPY_STR(p->name, "NIR Shader(s)"); + VK_COPY_STR(p->description, "The optimized NIR shader(s)"); if (radv_copy_representation(p->pData, &p->dataSize, shader->nir_string) != VK_SUCCESS) result = VK_INCOMPLETE; } @@ -1114,11 +1103,11 @@ radv_GetPipelineExecutableInternalRepresentationsKHR( if (p < end) { p->isText = true; if (radv_use_llvm_for_stage(pdev, stage)) { - desc_copy(p->name, "LLVM IR"); - desc_copy(p->description, "The LLVM IR after some optimizations"); + VK_COPY_STR(p->name, "LLVM IR"); + VK_COPY_STR(p->description, "The LLVM IR after some optimizations"); } else { - desc_copy(p->name, "ACO IR"); - desc_copy(p->description, "The ACO IR after some optimizations"); + VK_COPY_STR(p->name, "ACO IR"); + VK_COPY_STR(p->description, "The ACO IR after some optimizations"); } if (radv_copy_representation(p->pData, &p->dataSize, shader->ir_string) != VK_SUCCESS) result = VK_INCOMPLETE; @@ -1128,8 +1117,8 @@ radv_GetPipelineExecutableInternalRepresentationsKHR( /* Disassembler */ if (p < end && shader->disasm_string) { p->isText = true; - desc_copy(p->name, "Assembly"); - desc_copy(p->description, "Final Assembly"); + VK_COPY_STR(p->name, "Assembly"); + VK_COPY_STR(p->description, "Final Assembly"); if (radv_copy_representation(p->pData, &p->dataSize, shader->disasm_string) != VK_SUCCESS) result = VK_INCOMPLETE; }