diff --git a/src/gallium/drivers/iris/iris_context.h b/src/gallium/drivers/iris/iris_context.h index e2ad00fe4b7..0c99a33973c 100644 --- a/src/gallium/drivers/iris/iris_context.h +++ b/src/gallium/drivers/iris/iris_context.h @@ -590,9 +590,6 @@ struct iris_uncompiled_shader { /* Whether shader uses atomic operations. */ bool uses_atomic_load_store; - /** Size (in bytes) of the kernel input data */ - unsigned kernel_input_size; - /** Size (in bytes) of the local (shared) data passed as kernel inputs */ unsigned kernel_shared_size; @@ -684,9 +681,6 @@ struct iris_compiled_shader { uint32_t *system_values; unsigned num_system_values; - /** Size (in bytes) of the kernel input data */ - unsigned kernel_input_size; - /** Number of constbufs expected by the shader. */ unsigned num_cbufs; @@ -1398,7 +1392,6 @@ void iris_finalize_program(struct iris_compiled_shader *shader, uint32_t *streamout, uint32_t *system_values, unsigned num_system_values, - unsigned kernel_input_size, unsigned num_cbufs, const struct iris_binding_table *bt); diff --git a/src/gallium/drivers/iris/iris_disk_cache.c b/src/gallium/drivers/iris/iris_disk_cache.c index 78f97f5d0d0..6dcb8a2c216 100644 --- a/src/gallium/drivers/iris/iris_disk_cache.c +++ b/src/gallium/drivers/iris/iris_disk_cache.c @@ -149,7 +149,6 @@ iris_disk_cache_store(struct disk_cache *cache, blob_write_uint32(&blob, shader->num_system_values); blob_write_bytes(&blob, shader->system_values, shader->num_system_values * sizeof(uint32_t)); - blob_write_uint32(&blob, shader->kernel_input_size); if (brw) { blob_write_bytes(&blob, brw->relocs, brw->num_relocs * sizeof(struct brw_shader_reloc)); @@ -227,7 +226,6 @@ iris_disk_cache_retrieve(struct iris_screen *screen, void *prog_data = ralloc_size(NULL, prog_data_size); const void *assembly; uint32_t num_system_values; - uint32_t kernel_input_size; uint32_t *system_values = NULL; uint32_t *so_decls = NULL; @@ -258,8 +256,6 @@ iris_disk_cache_retrieve(struct iris_screen *screen, num_system_values * sizeof(uint32_t)); } - kernel_input_size = blob_read_uint32(&blob); - if (brw) { brw->relocs = NULL; if (brw->num_relocs) { @@ -320,7 +316,7 @@ iris_disk_cache_retrieve(struct iris_screen *screen, if (num_cbufs || ish->nir->num_uniforms) num_cbufs++; - if (num_system_values || kernel_input_size) + if (num_system_values) num_cbufs++; if (brw) @@ -333,7 +329,7 @@ iris_disk_cache_retrieve(struct iris_screen *screen, #endif iris_finalize_program(shader, so_decls, system_values, - num_system_values, kernel_input_size, num_cbufs, + num_system_values, num_cbufs, &bt); assert(stage < ARRAY_SIZE(cache_id_for_stage)); diff --git a/src/gallium/drivers/iris/iris_program.c b/src/gallium/drivers/iris/iris_program.c index f6d72cadad8..4af7b8e11e7 100644 --- a/src/gallium/drivers/iris/iris_program.c +++ b/src/gallium/drivers/iris/iris_program.c @@ -499,7 +499,6 @@ iris_finalize_program(struct iris_compiled_shader *shader, uint32_t *streamout, uint32_t *system_values, unsigned num_system_values, - unsigned kernel_input_size, unsigned num_cbufs, const struct iris_binding_table *bt) { @@ -513,7 +512,6 @@ iris_finalize_program(struct iris_compiled_shader *shader, shader->streamout = streamout; shader->system_values = system_values; shader->num_system_values = num_system_values; - shader->kernel_input_size = kernel_input_size; shader->num_cbufs = num_cbufs; shader->bt = *bt; @@ -948,13 +946,10 @@ static void iris_setup_uniforms(ASSERTED const struct intel_device_info *devinfo, void *mem_ctx, nir_shader *nir, - unsigned kernel_input_size, uint32_t **out_system_values, unsigned *out_num_system_values, unsigned *out_num_cbufs) { - unsigned system_values_start = ALIGN(kernel_input_size, sizeof(uint32_t)); - const unsigned IRIS_MAX_SYSTEM_VALUES = PIPE_MAX_SHADER_IMAGES * ISL_IMAGE_PARAM_SIZE; unsigned *system_values = @@ -1046,8 +1041,7 @@ iris_setup_uniforms(ASSERTED const struct intel_device_info *devinfo, } b.cursor = nir_before_instr(instr); - offset = nir_imm_int(&b, system_values_start + - ucp_idx[ucp] * sizeof(uint32_t)); + offset = nir_imm_int(&b, ucp_idx[ucp] * sizeof(uint32_t)); break; } case nir_intrinsic_load_patch_vertices_in: @@ -1058,8 +1052,7 @@ iris_setup_uniforms(ASSERTED const struct intel_device_info *devinfo, BRW_PARAM_BUILTIN_PATCH_VERTICES_IN; b.cursor = nir_before_instr(instr); - offset = nir_imm_int(&b, system_values_start + - patch_vert_idx * sizeof(uint32_t)); + offset = nir_imm_int(&b, patch_vert_idx * sizeof(uint32_t)); break; case nir_intrinsic_load_tess_level_outer_default: if (tess_outer_default_idx == -1) { @@ -1073,8 +1066,7 @@ iris_setup_uniforms(ASSERTED const struct intel_device_info *devinfo, } b.cursor = nir_before_instr(instr); - offset = nir_imm_int(&b, system_values_start + - tess_outer_default_idx * sizeof(uint32_t)); + offset = nir_imm_int(&b, tess_outer_default_idx * sizeof(uint32_t)); break; case nir_intrinsic_load_tess_level_inner_default: if (tess_inner_default_idx == -1) { @@ -1088,8 +1080,7 @@ iris_setup_uniforms(ASSERTED const struct intel_device_info *devinfo, } b.cursor = nir_before_instr(instr); - offset = nir_imm_int(&b, system_values_start + - tess_inner_default_idx * sizeof(uint32_t)); + offset = nir_imm_int(&b, tess_inner_default_idx * sizeof(uint32_t)); break; case nir_intrinsic_image_deref_load_param_intel: { assert(devinfo->ver < 9); @@ -1130,7 +1121,6 @@ iris_setup_uniforms(ASSERTED const struct intel_device_info *devinfo, b.cursor = nir_before_instr(instr); offset = nir_iadd_imm(&b, get_aoa_deref_offset(&b, deref, ISL_IMAGE_PARAM_SIZE * 4), - system_values_start + img_idx[var->data.binding] * 4 + nir_intrinsic_base(intrin) * 16); break; @@ -1147,8 +1137,7 @@ iris_setup_uniforms(ASSERTED const struct intel_device_info *devinfo, } b.cursor = nir_before_instr(instr); - offset = nir_imm_int(&b, system_values_start + - variable_group_size_idx * sizeof(uint32_t)); + offset = nir_imm_int(&b, variable_group_size_idx * sizeof(uint32_t)); break; } case nir_intrinsic_load_work_dim: { @@ -1157,13 +1146,10 @@ iris_setup_uniforms(ASSERTED const struct intel_device_info *devinfo, system_values[work_dim_idx] = BRW_PARAM_BUILTIN_WORK_DIM; } b.cursor = nir_before_instr(instr); - offset = nir_imm_int(&b, system_values_start + - work_dim_idx * sizeof(uint32_t)); + offset = nir_imm_int(&b, work_dim_idx * sizeof(uint32_t)); break; } case nir_intrinsic_load_kernel_input: { - assert(nir_intrinsic_base(intrin) + - nir_intrinsic_range(intrin) <= kernel_input_size); b.cursor = nir_before_instr(instr); offset = nir_iadd_imm(&b, intrin->src[0].ssa, nir_intrinsic_base(intrin)); @@ -1198,7 +1184,7 @@ iris_setup_uniforms(ASSERTED const struct intel_device_info *devinfo, num_cbufs++; /* Place the new params in a new cbuf. */ - if (num_system_values > 0 || kernel_input_size > 0) { + if (num_system_values > 0) { unsigned sysval_cbuf_index = num_cbufs; num_cbufs++; @@ -1879,7 +1865,7 @@ iris_compile_vs(struct iris_screen *screen, } } - iris_setup_uniforms(devinfo, mem_ctx, nir, 0, &system_values, + iris_setup_uniforms(devinfo, mem_ctx, nir, &system_values, &num_system_values, &num_cbufs); struct iris_binding_table bt; @@ -1973,7 +1959,7 @@ iris_compile_vs(struct iris_screen *screen, &iris_vue_data(shader)->vue_map); iris_finalize_program(shader, so_decls, - system_values, num_system_values, 0, num_cbufs, &bt); + system_values, num_system_values, num_cbufs, &bt); iris_upload_shader(screen, ish, shader, NULL, uploader, IRIS_CACHE_VS, sizeof(*key), key, program); @@ -2119,7 +2105,7 @@ iris_compile_tcs(struct iris_screen *screen, source_hash = *(uint32_t*)nir->info.source_blake3; } - iris_setup_uniforms(devinfo, mem_ctx, nir, 0, &system_values, + iris_setup_uniforms(devinfo, mem_ctx, nir, &system_values, &num_system_values, &num_cbufs); iris_setup_binding_table(devinfo, nir, &bt, /* num_render_targets */ 0, num_system_values, num_cbufs, false); @@ -2192,7 +2178,7 @@ iris_compile_tcs(struct iris_screen *screen, shader->compilation_failed = false; iris_finalize_program(shader, NULL, system_values, - num_system_values, 0, num_cbufs, &bt); + num_system_values, num_cbufs, &bt); iris_upload_shader(screen, ish, shader, passthrough_ht, uploader, IRIS_CACHE_TCS, sizeof(*key), key, program); @@ -2311,7 +2297,7 @@ iris_compile_tes(struct iris_screen *screen, nir_shader_gather_info(nir, impl); } - iris_setup_uniforms(devinfo, mem_ctx, nir, 0, &system_values, + iris_setup_uniforms(devinfo, mem_ctx, nir, &system_values, &num_system_values, &num_cbufs); struct iris_binding_table bt; @@ -2406,7 +2392,7 @@ iris_compile_tes(struct iris_screen *screen, &iris_vue_data(shader)->vue_map); iris_finalize_program(shader, so_decls, system_values, - num_system_values, 0, num_cbufs, &bt); + num_system_values, num_cbufs, &bt); iris_upload_shader(screen, ish, shader, NULL, uploader, IRIS_CACHE_TES, sizeof(*key), key, program); @@ -2497,7 +2483,7 @@ iris_compile_gs(struct iris_screen *screen, nir_shader_gather_info(nir, impl); } - iris_setup_uniforms(devinfo, mem_ctx, nir, 0, &system_values, + iris_setup_uniforms(devinfo, mem_ctx, nir, &system_values, &num_system_values, &num_cbufs); struct iris_binding_table bt; @@ -2587,7 +2573,7 @@ iris_compile_gs(struct iris_screen *screen, &iris_vue_data(shader)->vue_map); iris_finalize_program(shader, so_decls, system_values, - num_system_values, 0, num_cbufs, &bt); + num_system_values, num_cbufs, &bt); iris_upload_shader(screen, ish, shader, NULL, uploader, IRIS_CACHE_GS, sizeof(*key), key, program); @@ -2665,7 +2651,7 @@ iris_compile_fs(struct iris_screen *screen, nir_shader *nir = nir_shader_clone(mem_ctx, ish->nir); const struct iris_fs_prog_key *const key = &shader->key.fs; - iris_setup_uniforms(devinfo, mem_ctx, nir, 0, &system_values, + iris_setup_uniforms(devinfo, mem_ctx, nir, &system_values, &num_system_values, &num_cbufs); /* Lower output variables to load_output intrinsics before setting up @@ -2768,7 +2754,7 @@ iris_compile_fs(struct iris_screen *screen, shader->compilation_failed = false; iris_finalize_program(shader, NULL, system_values, - num_system_values, 0, num_cbufs, &bt); + num_system_values, num_cbufs, &bt); iris_upload_shader(screen, ish, shader, NULL, uploader, IRIS_CACHE_FS, sizeof(*key), key, program); @@ -3015,7 +3001,7 @@ iris_compile_cs(struct iris_screen *screen, unreachable("no elk support"); #endif - iris_setup_uniforms(devinfo, mem_ctx, nir, ish->kernel_input_size, + iris_setup_uniforms(devinfo, mem_ctx, nir, &system_values, &num_system_values, &num_cbufs); struct iris_binding_table bt; @@ -3089,7 +3075,7 @@ iris_compile_cs(struct iris_screen *screen, shader->compilation_failed = false; iris_finalize_program(shader, NULL, system_values, - num_system_values, ish->kernel_input_size, num_cbufs, + num_system_values, num_cbufs, &bt); iris_upload_shader(screen, ish, shader, NULL, uploader, IRIS_CACHE_CS, @@ -3314,7 +3300,6 @@ iris_create_compute_state(struct pipe_context *ctx, struct iris_uncompiled_shader *ish = iris_create_uncompiled_shader(screen, nir, NULL); - ish->kernel_input_size = state->req_input_mem; ish->kernel_shared_size = state->static_shared_mem; // XXX: disallow more than 64KB of shared variables diff --git a/src/gallium/drivers/iris/iris_program_cache.c b/src/gallium/drivers/iris/iris_program_cache.c index cc250e23a36..9522830f27d 100644 --- a/src/gallium/drivers/iris/iris_program_cache.c +++ b/src/gallium/drivers/iris/iris_program_cache.c @@ -295,7 +295,7 @@ iris_blorp_upload_shader(struct blorp_batch *blorp_batch, uint32_t stage, #endif } - iris_finalize_program(shader, NULL, NULL, 0, 0, 0, &bt); + iris_finalize_program(shader, NULL, NULL, 0, 0, &bt); iris_upload_shader(screen, NULL, shader, ice->shaders.cache, ice->shaders.uploader_driver, @@ -508,7 +508,7 @@ iris_ensure_indirect_generation_shader(struct iris_batch *batch) struct iris_binding_table bt; memset(&bt, 0, sizeof(bt)); - iris_finalize_program(shader, NULL, NULL, 0, 0, 0, &bt); + iris_finalize_program(shader, NULL, NULL, 0, 0, &bt); iris_upload_shader(screen, NULL, shader, ice->shaders.cache, ice->shaders.uploader_driver, diff --git a/src/gallium/drivers/iris/iris_screen.c b/src/gallium/drivers/iris/iris_screen.c index 6a40ba22a25..498ffcccd4f 100644 --- a/src/gallium/drivers/iris/iris_screen.c +++ b/src/gallium/drivers/iris/iris_screen.c @@ -250,8 +250,6 @@ iris_init_compute_caps(struct iris_screen *screen) */ caps->address_bits = 64; - snprintf(caps->ir_target, sizeof(caps->ir_target), "gen"); - caps->grid_dimension = 3; caps->max_grid_size[0] = diff --git a/src/gallium/drivers/iris/iris_state.c b/src/gallium/drivers/iris/iris_state.c index 5014e436fcd..83354036e4c 100644 --- a/src/gallium/drivers/iris/iris_state.c +++ b/src/gallium/drivers/iris/iris_state.c @@ -3550,14 +3550,6 @@ iris_set_sampler_views(struct pipe_context *ctx, : IRIS_DIRTY_RENDER_RESOLVES_AND_FLUSHES; } -static void -iris_set_compute_resources(struct pipe_context *ctx, - unsigned start, unsigned count, - struct pipe_surface **resources) -{ - assert(count == 0); -} - static void iris_set_global_binding(struct pipe_context *ctx, unsigned start_slot, unsigned count, @@ -4017,28 +4009,21 @@ upload_sysvals(struct iris_context *ice, struct iris_shader_state *shs = &ice->state.shaders[stage]; struct iris_compiled_shader *shader = ice->shaders.prog[stage]; - if (!shader || (shader->num_system_values == 0 && - shader->kernel_input_size == 0)) + if (!shader || shader->num_system_values == 0) return; assert(shader->num_cbufs > 0); unsigned sysval_cbuf_index = shader->num_cbufs - 1; struct pipe_shader_buffer *cbuf = &shs->constbuf[sysval_cbuf_index]; - unsigned system_values_start = - ALIGN(shader->kernel_input_size, sizeof(uint32_t)); - unsigned upload_size = system_values_start + - shader->num_system_values * sizeof(uint32_t); + unsigned upload_size = shader->num_system_values * sizeof(uint32_t); void *map = NULL; assert(sysval_cbuf_index < PIPE_MAX_CONSTANT_BUFFERS); u_upload_alloc(ice->ctx.const_uploader, 0, upload_size, 64, &cbuf->buffer_offset, &cbuf->buffer, &map); - if (shader->kernel_input_size > 0) - memcpy(map, grid->input, shader->kernel_input_size); - - uint32_t *sysval_map = map + system_values_start; + uint32_t *sysval_map = map; for (int i = 0; i < shader->num_system_values; i++) { uint32_t sysval = shader->system_values[i]; uint32_t value = 0; @@ -9356,9 +9341,8 @@ iris_upload_compute_state(struct iris_context *ice, */ iris_use_pinned_bo(batch, ice->state.binder.bo, false, IRIS_DOMAIN_NONE); - if (((stage_dirty & IRIS_STAGE_DIRTY_CONSTANTS_CS) && - shs->sysvals_need_upload) || - shader->kernel_input_size > 0) + if ((stage_dirty & IRIS_STAGE_DIRTY_CONSTANTS_CS) && + shs->sysvals_need_upload) upload_sysvals(ice, MESA_SHADER_COMPUTE, grid); if (stage_dirty & IRIS_STAGE_DIRTY_BINDINGS_CS) @@ -9479,7 +9463,6 @@ iris_rebind_buffer(struct iris_context *ice, PIPE_BIND_BLENDABLE | PIPE_BIND_DISPLAY_TARGET | PIPE_BIND_CURSOR | - PIPE_BIND_COMPUTE_RESOURCE | PIPE_BIND_GLOBAL))); if (res->bind_history & PIPE_BIND_VERTEX_BUFFER) { @@ -10557,7 +10540,6 @@ genX(init_state)(struct iris_context *ice) ctx->set_shader_buffers = iris_set_shader_buffers; ctx->set_shader_images = iris_set_shader_images; ctx->set_sampler_views = iris_set_sampler_views; - ctx->set_compute_resources = iris_set_compute_resources; ctx->set_global_binding = iris_set_global_binding; ctx->set_tess_state = iris_set_tess_state; ctx->set_patch_vertices = iris_set_patch_vertices;