From d041640b8877f04e6f68a6e29a4ee1c362d53df3 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Daniel=20Sch=C3=BCrmann?= Date: Thu, 18 Sep 2025 12:25:38 +0200 Subject: [PATCH] aco: remove excess offset handling for load/store_shared Part-of: --- .../aco_select_nir_intrinsics.cpp | 15 +++------------ 1 file changed, 3 insertions(+), 12 deletions(-) diff --git a/src/amd/compiler/instruction_selection/aco_select_nir_intrinsics.cpp b/src/amd/compiler/instruction_selection/aco_select_nir_intrinsics.cpp index 3c642a981ee..eec62b5b760 100644 --- a/src/amd/compiler/instruction_selection/aco_select_nir_intrinsics.cpp +++ b/src/amd/compiler/instruction_selection/aco_select_nir_intrinsics.cpp @@ -15,6 +15,7 @@ #include "ac_nir.h" #include "amdgfxregs.h" #include +#include namespace aco { namespace { @@ -2932,12 +2933,7 @@ visit_load_shared(isel_context* ctx, nir_intrinsic_instr* instr) } unsigned const_offset = nir_intrinsic_base(instr); - unsigned const_offset_range = 65536; - if (const_offset >= const_offset_range) { - unsigned excess = const_offset - (const_offset % const_offset_range); - address = bld.vadd32(bld.def(v1), address, Operand::c32(excess)); - const_offset -= excess; - } + assert(const_offset <= UINT16_MAX); Definition def = dst.regClass().type() == RegType::sgpr ? bld.def(RegClass::get(RegType::vgpr, bytes)) @@ -2992,12 +2988,7 @@ visit_store_shared(isel_context* ctx, nir_intrinsic_instr* instr) } unsigned const_offset = nir_intrinsic_base(instr); - unsigned const_offset_range = 65536; - if (const_offset >= const_offset_range) { - unsigned excess = const_offset - (const_offset % const_offset_range); - address = bld.vadd32(bld.def(v1), address, Operand::c32(excess)); - const_offset -= excess; - } + assert(const_offset <= UINT16_MAX); Instruction* ds = bld.ds(op, address, data, m, const_offset); ds->ds().sync = memory_sync_info(storage_shared);