diff --git a/src/gallium/drivers/radeonsi/radeon_vcn_enc_1_2.c b/src/gallium/drivers/radeonsi/radeon_vcn_enc_1_2.c
index 7ee2cf831f8..5aca2c182a4 100644
--- a/src/gallium/drivers/radeonsi/radeon_vcn_enc_1_2.c
+++ b/src/gallium/drivers/radeonsi/radeon_vcn_enc_1_2.c
@@ -375,7 +375,7 @@ unsigned int radeon_enc_write_sps_hevc(struct radeon_encoder *enc, uint8_t *out)
 
    radeon_enc_code_ue(enc, sps->num_short_term_ref_pic_sets);
    for (i = 0; i < sps->num_short_term_ref_pic_sets; i++)
-      radeon_enc_hevc_st_ref_pic_set(enc, i, sps->num_short_term_ref_pic_sets, &sps->st_ref_pic_set[i]);
+      radeon_enc_hevc_st_ref_pic_set(enc, i, sps->num_short_term_ref_pic_sets, sps->st_ref_pic_set);
 
    radeon_enc_code_fixed_bits(enc, sps->long_term_ref_pics_present_flag, 1);
    if (sps->long_term_ref_pics_present_flag) {
@@ -840,7 +840,7 @@ static void radeon_enc_slice_header_hevc(struct radeon_encoder *enc)
       if (!slice->short_term_ref_pic_set_sps_flag) {
          num_pic_total_curr =
             radeon_enc_hevc_st_ref_pic_set(enc, sps->num_short_term_ref_pic_sets,
-                                           sps->num_short_term_ref_pic_sets, &slice->st_ref_pic_set);
+                                           sps->num_short_term_ref_pic_sets, sps->st_ref_pic_set);
       } else if (sps->num_short_term_ref_pic_sets > 1) {
          radeon_enc_code_fixed_bits(enc, slice->short_term_ref_pic_set_idx,
                                     util_logbase2_ceil(sps->num_short_term_ref_pic_sets));
diff --git a/src/gallium/frontends/va/picture_hevc_enc.c b/src/gallium/frontends/va/picture_hevc_enc.c
index 10a82153432..b933c5c5fc1 100644
--- a/src/gallium/frontends/va/picture_hevc_enc.c
+++ b/src/gallium/frontends/va/picture_hevc_enc.c
@@ -603,7 +603,7 @@ static void parseEncSliceParamsH265(vlVaContext *context,
       slice->short_term_ref_pic_set_sps_flag = vl_rbsp_u(rbsp, 1);
       if (!slice->short_term_ref_pic_set_sps_flag) {
          num_pic_total_curr = st_ref_pic_set(seq->num_short_term_ref_pic_sets, seq->num_short_term_ref_pic_sets,
-                                             &slice->st_ref_pic_set, rbsp);
+                                             seq->st_ref_pic_set, rbsp);
       }
       else if (seq->num_short_term_ref_pic_sets > 1)
          slice->short_term_ref_pic_set_idx = vl_rbsp_u(rbsp, util_logbase2_ceil(seq->num_short_term_ref_pic_sets));
diff --git a/src/gallium/include/pipe/p_video_state.h b/src/gallium/include/pipe/p_video_state.h
index 70aeb670e40..30b90a05e99 100644
--- a/src/gallium/include/pipe/p_video_state.h
+++ b/src/gallium/include/pipe/p_video_state.h
@@ -61,7 +61,7 @@ extern "C" {
 #define PIPE_H265_MAX_DELTA_POC 48
 #define PIPE_H265_MAX_DPB_SIZE 16
 #define PIPE_H265_MAX_NUM_LIST_REF 15
-#define PIPE_H265_MAX_ST_REF_PIC_SETS 64
+#define PIPE_H265_MAX_ST_REF_PIC_SETS 65
 #define PIPE_H265_MAX_SUB_LAYERS 7
 #define PIPE_AV1_MAX_DPB_SIZE 8
 #define PIPE_AV1_REFS_PER_FRAME 7
@@ -1125,7 +1125,6 @@ struct pipe_h265_enc_slice_param
    int8_t slice_cr_qp_offset;
    int8_t slice_beta_offset_div2;
    int8_t slice_tc_offset_div2;
-   struct pipe_h265_st_ref_pic_set st_ref_pic_set;
    struct pipe_h265_ref_pic_lists_modification ref_pic_lists_modification;
 };