From cd72ce32132442800bf0aa8660c80ad50515f79a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Timur=20Krist=C3=B3f?= Date: Thu, 20 Nov 2025 12:08:55 +0100 Subject: [PATCH] ac/gpu_info: Rename has_sparse_vm_mappings to has_sparse MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit No functional changes. Just simplify the name. Signed-off-by: Timur Kristóf Reviewed-by: Samuel Pitoiset Part-of: --- src/amd/common/ac_gpu_info.c | 4 ++-- src/amd/common/ac_gpu_info.h | 2 +- src/amd/vulkan/radv_formats.c | 2 +- src/amd/vulkan/radv_physical_device.c | 4 ++-- src/amd/vulkan/radv_physical_device.h | 2 +- src/gallium/drivers/radeonsi/si_get.c | 2 +- src/gallium/winsys/radeon/drm/radeon_drm_winsys.c | 2 +- 7 files changed, 9 insertions(+), 9 deletions(-) diff --git a/src/amd/common/ac_gpu_info.c b/src/amd/common/ac_gpu_info.c index 063ca11e918..0d5b2ee816a 100644 --- a/src/amd/common/ac_gpu_info.c +++ b/src/amd/common/ac_gpu_info.c @@ -724,7 +724,7 @@ ac_query_gpu_info(int fd, void *dev_p, struct radeon_info *info, * except Polaris where it happens to work "well enough". * Enable them when these are investigated and fixed in the driver. */ - info->has_sparse_vm_mappings = info->family >= CHIP_POLARIS10; + info->has_sparse = info->family >= CHIP_POLARIS10; info->has_gang_submit = info->drm_minor >= 49; info->has_gpuvm_fault_query = info->drm_minor >= 55; info->has_tmz_support = device_info.ids_flags & AMDGPU_IDS_FLAGS_TMZ; @@ -1843,7 +1843,7 @@ void ac_print_gpu_info(FILE *f, const struct radeon_info *info, int fd) fprintf(f, " has_vm_always_valid = %u\n", info->has_vm_always_valid); fprintf(f, " has_bo_metadata = %u\n", info->has_bo_metadata); fprintf(f, " has_eqaa_surface_allocator = %u\n", info->has_eqaa_surface_allocator); - fprintf(f, " has_sparse_vm_mappings = %u\n", info->has_sparse_vm_mappings); + fprintf(f, " has_sparse = %u\n", info->has_sparse); fprintf(f, " has_stable_pstate = %u\n", info->has_stable_pstate); fprintf(f, " has_gang_submit = %u\n", info->has_gang_submit); fprintf(f, " has_gpuvm_fault_query = %u\n", info->has_gpuvm_fault_query); diff --git a/src/amd/common/ac_gpu_info.h b/src/amd/common/ac_gpu_info.h index 75103adaaaa..5db4169bada 100644 --- a/src/amd/common/ac_gpu_info.h +++ b/src/amd/common/ac_gpu_info.h @@ -238,7 +238,7 @@ struct radeon_info { bool has_vm_always_valid; bool has_bo_metadata; bool has_eqaa_surface_allocator; - bool has_sparse_vm_mappings; + bool has_sparse; bool has_gang_submit; bool has_gpuvm_fault_query; bool has_pcie_bandwidth_info; diff --git a/src/amd/vulkan/radv_formats.c b/src/amd/vulkan/radv_formats.c index 5f2847dd0ab..dd6985365ee 100644 --- a/src/amd/vulkan/radv_formats.c +++ b/src/amd/vulkan/radv_formats.c @@ -1059,7 +1059,7 @@ radv_get_image_format_properties(struct radv_physical_device *pdev, const VkPhys } if (info->flags & VK_IMAGE_CREATE_SPARSE_BINDING_BIT) { - if (!pdev->info.has_sparse_vm_mappings) + if (!pdev->info.has_sparse) goto unsupported; /* Sparse resources with multi-planar formats are unsupported. */ diff --git a/src/amd/vulkan/radv_physical_device.c b/src/amd/vulkan/radv_physical_device.c index 22c2a86ae0b..02c4b4513b7 100644 --- a/src/amd/vulkan/radv_physical_device.c +++ b/src/amd/vulkan/radv_physical_device.c @@ -899,7 +899,7 @@ radv_physical_device_get_features(const struct radv_physical_device *pdev, struc .shaderFloat64 = true, .shaderInt64 = true, .shaderInt16 = true, - .sparseBinding = pdev->info.has_sparse_vm_mappings, + .sparseBinding = pdev->info.has_sparse, .sparseResidencyBuffer = pdev->info.family >= CHIP_POLARIS10, .sparseResidencyImage2D = pdev->info.family >= CHIP_POLARIS10, .sparseResidencyImage3D = pdev->info.family >= CHIP_POLARIS10, @@ -1604,7 +1604,7 @@ radv_get_physical_device_properties(struct radv_physical_device *pdev) .maxMemoryAllocationCount = UINT32_MAX, .maxSamplerAllocationCount = 64 * 1024, .bufferImageGranularity = 1, - .sparseAddressSpaceSize = pdev->info.has_sparse_vm_mappings ? pdev->info.virtual_address_max : 0, + .sparseAddressSpaceSize = pdev->info.has_sparse ? pdev->info.virtual_address_max : 0, .maxBoundDescriptorSets = MAX_SETS, .maxPerStageDescriptorSamplers = max_descriptor_set_size, .maxPerStageDescriptorUniformBuffers = max_descriptor_set_size, diff --git a/src/amd/vulkan/radv_physical_device.h b/src/amd/vulkan/radv_physical_device.h index ca16d784b3a..0f57f0c6b0e 100644 --- a/src/amd/vulkan/radv_physical_device.h +++ b/src/amd/vulkan/radv_physical_device.h @@ -241,7 +241,7 @@ radv_dedicated_sparse_queue_enabled(const struct radv_physical_device *pdev) /* Dedicated sparse queue requires VK_QUEUE_SUBMIT_MODE_THREADED, which is incompatible with * VK_DEVICE_TIMELINE_MODE_EMULATED. */ return pdev->info.has_timeline_syncobj && - pdev->info.has_sparse_vm_mappings; + pdev->info.has_sparse; } static inline bool diff --git a/src/gallium/drivers/radeonsi/si_get.c b/src/gallium/drivers/radeonsi/si_get.c index 5d686f91073..4ecd09fc2e2 100644 --- a/src/gallium/drivers/radeonsi/si_get.c +++ b/src/gallium/drivers/radeonsi/si_get.c @@ -1023,7 +1023,7 @@ void si_init_screen_caps(struct si_screen *sscreen) /* Gfx8 (Polaris11) hangs, so don't enable this on Gfx8 and older chips. */ bool enable_sparse = - sscreen->info.gfx_level >= GFX9 && sscreen->info.has_sparse_vm_mappings; + sscreen->info.gfx_level >= GFX9 && sscreen->info.has_sparse; /* Supported features (boolean caps). */ caps->max_dual_source_render_targets = true; diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c index 05836d43f93..0eede23f57a 100644 --- a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c +++ b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c @@ -628,7 +628,7 @@ static bool do_winsys_init(struct radeon_drm_winsys *ws) ws->info.tcc_cache_line_size = 64; /* TC L2 line size on GCN */ ws->info.has_bo_metadata = false; ws->info.has_eqaa_surface_allocator = false; - ws->info.has_sparse_vm_mappings = false; + ws->info.has_sparse = false; ws->info.max_alignment = 1024*1024; ws->info.has_graphics = true; ws->info.cpdma_prefetch_writes_memory = true;