From cd343fb9acd49706320ea3bf1bbc0c842b9c6970 Mon Sep 17 00:00:00 2001
From: Ian Romanick <ian.d.romanick@intel.com>
Date: Tue, 18 Jun 2019 18:21:44 -0700
Subject: [PATCH] intel/brw: Add support for fcsel opcodes

Don't enable nir_opt_algebraic to generate these opcodes yet.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29095>
---
 src/intel/compiler/brw_fs_nir.cpp | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp
index d4c5e7daec8..742d4314beb 100644
--- a/src/intel/compiler/brw_fs_nir.cpp
+++ b/src/intel/compiler/brw_fs_nir.cpp
@@ -1890,6 +1890,18 @@ fs_nir_emit_alu(nir_to_brw_state &ntb, nir_alu_instr *instr,
       inst->predicate = BRW_PREDICATE_NORMAL;
       break;
 
+   case nir_op_fcsel:
+      bld.CSEL(result, op[1], op[2], op[0], BRW_CONDITIONAL_NZ);
+      break;
+
+   case nir_op_fcsel_gt:
+      bld.CSEL(result, op[1], op[2], op[0], BRW_CONDITIONAL_G);
+      break;
+
+   case nir_op_fcsel_ge:
+      bld.CSEL(result, op[1], op[2], op[0], BRW_CONDITIONAL_GE);
+      break;
+
    case nir_op_extract_u8:
    case nir_op_extract_i8: {
       const brw_reg_type type = brw_int_type(1, instr->op == nir_op_extract_i8);