i965: Add functions to abstract access to register types
Previously the brw_inst{,_set}_{dst,src0,src1}_reg_type() functions
provided access to the hardware encodings for the register types. We
often mixed these with the logical BRW_REGISTER_TYPE_* enums (which
themselves used to be the hardware format!) with bad results.
With that functionality now available with the hw_ versions (see
previous commit), we now add functions that take the logical
BRW_REGISTER_TYPE_* enums and convert into the hardware format and vice
versa. To do the conversion we also have to provide the file.
Note the asymmetry between the two functions: the new getter reads the
file from the instruction word, and to ensure that is always set the
setter writes both the file and the type.
Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
This commit is contained in:
@@ -208,19 +208,19 @@ TEST_P(validation_test, opcode46)
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TEST_P(validation_test, dest_stride_must_be_equal_to_the_ratio_of_exec_size_to_dest_size)
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{
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brw_ADD(p, g0, g0, g0);
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brw_inst_set_dst_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
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brw_inst_set_src0_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_D);
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brw_inst_set_src1_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_D);
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brw_inst_set_dst_file_type(&devinfo, last_inst, BRW_GENERAL_REGISTER_FILE, BRW_REGISTER_TYPE_W);
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brw_inst_set_src0_file_type(&devinfo, last_inst, BRW_GENERAL_REGISTER_FILE, BRW_REGISTER_TYPE_D);
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brw_inst_set_src1_file_type(&devinfo, last_inst, BRW_GENERAL_REGISTER_FILE, BRW_REGISTER_TYPE_D);
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EXPECT_FALSE(validate(p));
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clear_instructions(p);
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brw_ADD(p, g0, g0, g0);
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brw_inst_set_dst_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
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brw_inst_set_dst_file_type(&devinfo, last_inst, BRW_GENERAL_REGISTER_FILE, BRW_REGISTER_TYPE_W);
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brw_inst_set_dst_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_2);
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brw_inst_set_src0_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_D);
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brw_inst_set_src1_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_D);
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brw_inst_set_src0_file_type(&devinfo, last_inst, BRW_GENERAL_REGISTER_FILE, BRW_REGISTER_TYPE_D);
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brw_inst_set_src1_file_type(&devinfo, last_inst, BRW_GENERAL_REGISTER_FILE, BRW_REGISTER_TYPE_D);
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EXPECT_TRUE(validate(p));
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}
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@@ -234,9 +234,9 @@ TEST_P(validation_test, dst_subreg_must_be_aligned_to_exec_type_size)
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brw_ADD(p, g0, g0, g0);
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brw_inst_set_dst_da1_subreg_nr(&devinfo, last_inst, 2);
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brw_inst_set_dst_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_2);
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brw_inst_set_dst_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
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brw_inst_set_src0_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_D);
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brw_inst_set_src1_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_D);
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brw_inst_set_dst_file_type(&devinfo, last_inst, BRW_GENERAL_REGISTER_FILE, BRW_REGISTER_TYPE_W);
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brw_inst_set_src0_file_type(&devinfo, last_inst, BRW_GENERAL_REGISTER_FILE, BRW_REGISTER_TYPE_D);
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brw_inst_set_src1_file_type(&devinfo, last_inst, BRW_GENERAL_REGISTER_FILE, BRW_REGISTER_TYPE_D);
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EXPECT_FALSE(validate(p));
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@@ -246,12 +246,12 @@ TEST_P(validation_test, dst_subreg_must_be_aligned_to_exec_type_size)
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brw_inst_set_exec_size(&devinfo, last_inst, BRW_EXECUTE_4);
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brw_inst_set_dst_da1_subreg_nr(&devinfo, last_inst, 8);
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brw_inst_set_dst_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_2);
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brw_inst_set_dst_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
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brw_inst_set_src0_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_D);
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brw_inst_set_dst_file_type(&devinfo, last_inst, BRW_GENERAL_REGISTER_FILE, BRW_REGISTER_TYPE_W);
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brw_inst_set_src0_file_type(&devinfo, last_inst, BRW_GENERAL_REGISTER_FILE, BRW_REGISTER_TYPE_D);
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brw_inst_set_src0_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_4);
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brw_inst_set_src0_width(&devinfo, last_inst, BRW_WIDTH_4);
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brw_inst_set_src0_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_1);
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brw_inst_set_src1_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_D);
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brw_inst_set_src1_file_type(&devinfo, last_inst, BRW_GENERAL_REGISTER_FILE, BRW_REGISTER_TYPE_D);
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brw_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_4);
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brw_inst_set_src1_width(&devinfo, last_inst, BRW_WIDTH_4);
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brw_inst_set_src1_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_1);
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@@ -379,8 +379,8 @@ TEST_P(validation_test, dst_horizontal_stride_0)
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EXPECT_FALSE(validate(p));
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}
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/* VertStride must be used to cross GRF register boundaries. This rule implies
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* that elements within a 'Width' cannot cross GRF boundaries.
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/* VertStride must be used to cross BRW_GENERAL_REGISTER_FILE register boundaries. This rule implies
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* that elements within a 'Width' cannot cross BRW_GENERAL_REGISTER_FILE boundaries.
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*/
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TEST_P(validation_test, must_not_cross_grf_boundary_in_a_width)
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{
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@@ -471,16 +471,16 @@ TEST_P(validation_test, vstride_on_align16_must_be_0_or_4)
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}
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}
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/* In Direct Addressing mode, a source cannot span more than 2 adjacent GRF
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/* In Direct Addressing mode, a source cannot span more than 2 adjacent BRW_GENERAL_REGISTER_FILE
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* registers.
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*/
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TEST_P(validation_test, source_cannot_span_more_than_2_registers)
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{
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brw_ADD(p, g0, g0, g0);
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brw_inst_set_exec_size(&devinfo, last_inst, BRW_EXECUTE_32);
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brw_inst_set_dst_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
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brw_inst_set_src0_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
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brw_inst_set_src1_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
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brw_inst_set_dst_file_type(&devinfo, last_inst, BRW_GENERAL_REGISTER_FILE, BRW_REGISTER_TYPE_W);
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brw_inst_set_src0_file_type(&devinfo, last_inst, BRW_GENERAL_REGISTER_FILE, BRW_REGISTER_TYPE_W);
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brw_inst_set_src1_file_type(&devinfo, last_inst, BRW_GENERAL_REGISTER_FILE, BRW_REGISTER_TYPE_W);
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brw_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_16);
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brw_inst_set_src1_width(&devinfo, last_inst, BRW_WIDTH_8);
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brw_inst_set_src1_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_2);
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@@ -491,9 +491,9 @@ TEST_P(validation_test, source_cannot_span_more_than_2_registers)
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brw_ADD(p, g0, g0, g0);
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brw_inst_set_exec_size(&devinfo, last_inst, BRW_EXECUTE_16);
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brw_inst_set_dst_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
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brw_inst_set_src0_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
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brw_inst_set_src1_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
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brw_inst_set_dst_file_type(&devinfo, last_inst, BRW_GENERAL_REGISTER_FILE, BRW_REGISTER_TYPE_W);
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brw_inst_set_src0_file_type(&devinfo, last_inst, BRW_GENERAL_REGISTER_FILE, BRW_REGISTER_TYPE_W);
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brw_inst_set_src1_file_type(&devinfo, last_inst, BRW_GENERAL_REGISTER_FILE, BRW_REGISTER_TYPE_W);
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brw_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_16);
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brw_inst_set_src1_width(&devinfo, last_inst, BRW_WIDTH_8);
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brw_inst_set_src1_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_2);
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@@ -509,15 +509,15 @@ TEST_P(validation_test, source_cannot_span_more_than_2_registers)
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EXPECT_TRUE(validate(p));
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}
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/* A destination cannot span more than 2 adjacent GRF registers. */
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/* A destination cannot span more than 2 adjacent BRW_GENERAL_REGISTER_FILE registers. */
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TEST_P(validation_test, destination_cannot_span_more_than_2_registers)
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{
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brw_ADD(p, g0, g0, g0);
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brw_inst_set_exec_size(&devinfo, last_inst, BRW_EXECUTE_32);
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brw_inst_set_dst_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_2);
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brw_inst_set_dst_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
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brw_inst_set_src0_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
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brw_inst_set_src1_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
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brw_inst_set_dst_file_type(&devinfo, last_inst, BRW_GENERAL_REGISTER_FILE, BRW_REGISTER_TYPE_W);
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brw_inst_set_src0_file_type(&devinfo, last_inst, BRW_GENERAL_REGISTER_FILE, BRW_REGISTER_TYPE_W);
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brw_inst_set_src1_file_type(&devinfo, last_inst, BRW_GENERAL_REGISTER_FILE, BRW_REGISTER_TYPE_W);
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EXPECT_FALSE(validate(p));
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@@ -527,12 +527,12 @@ TEST_P(validation_test, destination_cannot_span_more_than_2_registers)
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brw_inst_set_exec_size(&devinfo, last_inst, BRW_EXECUTE_8);
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brw_inst_set_dst_da1_subreg_nr(&devinfo, last_inst, 6);
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brw_inst_set_dst_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_4);
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brw_inst_set_dst_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
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brw_inst_set_src0_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
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brw_inst_set_dst_file_type(&devinfo, last_inst, BRW_GENERAL_REGISTER_FILE, BRW_REGISTER_TYPE_W);
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brw_inst_set_src0_file_type(&devinfo, last_inst, BRW_GENERAL_REGISTER_FILE, BRW_REGISTER_TYPE_W);
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brw_inst_set_src0_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_16);
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brw_inst_set_src0_width(&devinfo, last_inst, BRW_WIDTH_4);
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brw_inst_set_src0_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_1);
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brw_inst_set_src1_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
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brw_inst_set_src1_file_type(&devinfo, last_inst, BRW_GENERAL_REGISTER_FILE, BRW_REGISTER_TYPE_W);
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brw_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_16);
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brw_inst_set_src1_width(&devinfo, last_inst, BRW_WIDTH_4);
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brw_inst_set_src1_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_1);
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@@ -544,9 +544,9 @@ TEST_P(validation_test, src_region_spans_two_regs_dst_region_spans_one)
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{
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/* Writes to dest are to the lower OWord */
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brw_ADD(p, g0, g0, g0);
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brw_inst_set_dst_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
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brw_inst_set_src0_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
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brw_inst_set_src1_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
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brw_inst_set_dst_file_type(&devinfo, last_inst, BRW_GENERAL_REGISTER_FILE, BRW_REGISTER_TYPE_W);
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brw_inst_set_src0_file_type(&devinfo, last_inst, BRW_GENERAL_REGISTER_FILE, BRW_REGISTER_TYPE_W);
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brw_inst_set_src1_file_type(&devinfo, last_inst, BRW_GENERAL_REGISTER_FILE, BRW_REGISTER_TYPE_W);
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brw_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_16);
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brw_inst_set_src1_width(&devinfo, last_inst, BRW_WIDTH_4);
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brw_inst_set_src1_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_2);
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@@ -558,9 +558,9 @@ TEST_P(validation_test, src_region_spans_two_regs_dst_region_spans_one)
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/* Writes to dest are to the upper OWord */
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brw_ADD(p, g0, g0, g0);
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brw_inst_set_dst_da1_subreg_nr(&devinfo, last_inst, 16);
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brw_inst_set_dst_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
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brw_inst_set_src0_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
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brw_inst_set_src1_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
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brw_inst_set_dst_file_type(&devinfo, last_inst, BRW_GENERAL_REGISTER_FILE, BRW_REGISTER_TYPE_W);
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brw_inst_set_src0_file_type(&devinfo, last_inst, BRW_GENERAL_REGISTER_FILE, BRW_REGISTER_TYPE_W);
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brw_inst_set_src1_file_type(&devinfo, last_inst, BRW_GENERAL_REGISTER_FILE, BRW_REGISTER_TYPE_W);
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brw_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_16);
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brw_inst_set_src1_width(&devinfo, last_inst, BRW_WIDTH_4);
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brw_inst_set_src1_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_2);
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@@ -572,9 +572,9 @@ TEST_P(validation_test, src_region_spans_two_regs_dst_region_spans_one)
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/* Writes to dest are evenly split between OWords */
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brw_ADD(p, g0, g0, g0);
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brw_inst_set_exec_size(&devinfo, last_inst, BRW_EXECUTE_16);
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brw_inst_set_dst_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
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brw_inst_set_src0_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
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brw_inst_set_src1_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
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brw_inst_set_dst_file_type(&devinfo, last_inst, BRW_GENERAL_REGISTER_FILE, BRW_REGISTER_TYPE_W);
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brw_inst_set_src0_file_type(&devinfo, last_inst, BRW_GENERAL_REGISTER_FILE, BRW_REGISTER_TYPE_W);
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brw_inst_set_src1_file_type(&devinfo, last_inst, BRW_GENERAL_REGISTER_FILE, BRW_REGISTER_TYPE_W);
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brw_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_16);
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brw_inst_set_src1_width(&devinfo, last_inst, BRW_WIDTH_8);
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brw_inst_set_src1_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_2);
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@@ -587,12 +587,12 @@ TEST_P(validation_test, src_region_spans_two_regs_dst_region_spans_one)
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brw_ADD(p, g0, g0, g0);
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brw_inst_set_exec_size(&devinfo, last_inst, BRW_EXECUTE_4);
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brw_inst_set_dst_da1_subreg_nr(&devinfo, last_inst, 10);
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brw_inst_set_dst_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
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brw_inst_set_src0_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
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brw_inst_set_dst_file_type(&devinfo, last_inst, BRW_GENERAL_REGISTER_FILE, BRW_REGISTER_TYPE_W);
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brw_inst_set_src0_file_type(&devinfo, last_inst, BRW_GENERAL_REGISTER_FILE, BRW_REGISTER_TYPE_W);
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brw_inst_set_src0_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_4);
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brw_inst_set_src0_width(&devinfo, last_inst, BRW_WIDTH_4);
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brw_inst_set_src0_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_1);
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brw_inst_set_src1_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
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brw_inst_set_src1_file_type(&devinfo, last_inst, BRW_GENERAL_REGISTER_FILE, BRW_REGISTER_TYPE_W);
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brw_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_16);
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brw_inst_set_src1_width(&devinfo, last_inst, BRW_WIDTH_2);
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brw_inst_set_src1_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_1);
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@@ -679,9 +679,9 @@ TEST_P(validation_test, two_src_two_dst_each_dst_must_be_derived_from_one_src)
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brw_MOV(p, g0, g0);
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brw_inst_set_exec_size(&devinfo, last_inst, BRW_EXECUTE_16);
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brw_inst_set_dst_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
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brw_inst_set_dst_file_type(&devinfo, last_inst, BRW_GENERAL_REGISTER_FILE, BRW_REGISTER_TYPE_W);
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brw_inst_set_dst_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_2);
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brw_inst_set_src0_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
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brw_inst_set_src0_file_type(&devinfo, last_inst, BRW_GENERAL_REGISTER_FILE, BRW_REGISTER_TYPE_W);
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brw_inst_set_src0_da1_subreg_nr(&devinfo, last_inst, 8);
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brw_inst_set_src0_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_4);
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brw_inst_set_src0_width(&devinfo, last_inst, BRW_WIDTH_4);
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@@ -716,9 +716,9 @@ TEST_P(validation_test, one_src_two_dst)
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brw_ADD(p, g0, g0, g0);
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brw_inst_set_exec_size(&devinfo, last_inst, BRW_EXECUTE_16);
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brw_inst_set_dst_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_D);
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brw_inst_set_src0_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
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brw_inst_set_src1_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
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brw_inst_set_dst_file_type(&devinfo, last_inst, BRW_GENERAL_REGISTER_FILE, BRW_REGISTER_TYPE_D);
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brw_inst_set_src0_file_type(&devinfo, last_inst, BRW_GENERAL_REGISTER_FILE, BRW_REGISTER_TYPE_W);
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brw_inst_set_src1_file_type(&devinfo, last_inst, BRW_GENERAL_REGISTER_FILE, BRW_REGISTER_TYPE_W);
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EXPECT_TRUE(validate(p));
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@@ -727,9 +727,9 @@ TEST_P(validation_test, one_src_two_dst)
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brw_ADD(p, g0, g0, g0);
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brw_inst_set_exec_size(&devinfo, last_inst, BRW_EXECUTE_16);
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brw_inst_set_dst_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_2);
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brw_inst_set_dst_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
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brw_inst_set_src0_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
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brw_inst_set_src1_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
|
||||
brw_inst_set_dst_file_type(&devinfo, last_inst, BRW_GENERAL_REGISTER_FILE, BRW_REGISTER_TYPE_W);
|
||||
brw_inst_set_src0_file_type(&devinfo, last_inst, BRW_GENERAL_REGISTER_FILE, BRW_REGISTER_TYPE_W);
|
||||
brw_inst_set_src1_file_type(&devinfo, last_inst, BRW_GENERAL_REGISTER_FILE, BRW_REGISTER_TYPE_W);
|
||||
brw_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_0);
|
||||
brw_inst_set_src1_width(&devinfo, last_inst, BRW_WIDTH_1);
|
||||
brw_inst_set_src1_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_0);
|
||||
@@ -745,12 +745,12 @@ TEST_P(validation_test, one_src_two_dst)
|
||||
brw_ADD(p, g0, g0, g0);
|
||||
brw_inst_set_exec_size(&devinfo, last_inst, BRW_EXECUTE_16);
|
||||
brw_inst_set_dst_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_2);
|
||||
brw_inst_set_dst_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
|
||||
brw_inst_set_src0_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
|
||||
brw_inst_set_dst_file_type(&devinfo, last_inst, BRW_GENERAL_REGISTER_FILE, BRW_REGISTER_TYPE_W);
|
||||
brw_inst_set_src0_file_type(&devinfo, last_inst, BRW_GENERAL_REGISTER_FILE, BRW_REGISTER_TYPE_W);
|
||||
brw_inst_set_src0_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_0);
|
||||
brw_inst_set_src0_width(&devinfo, last_inst, BRW_WIDTH_1);
|
||||
brw_inst_set_src0_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_0);
|
||||
brw_inst_set_src1_reg_hw_type(&devinfo, last_inst, BRW_HW_REG_TYPE_W);
|
||||
brw_inst_set_src1_file_type(&devinfo, last_inst, BRW_GENERAL_REGISTER_FILE, BRW_REGISTER_TYPE_W);
|
||||
|
||||
if (devinfo.gen >= 8) {
|
||||
EXPECT_TRUE(validate(p));
|
||||
|
||||
Reference in New Issue
Block a user