From cafec54c796a186903e1db7785d468a50230e894 Mon Sep 17 00:00:00 2001 From: Lionel Landwerlin Date: Tue, 26 Nov 2024 16:35:05 +0200 Subject: [PATCH] Revert in correct commit "fix" This reverts commit 38c7e40bc02578585cc56c3a2d016d0b06ade184. Fixes: b625a573 ("fix") Part-of: --- src/intel/compiler/intel_nir_blockify_uniform_loads.c | 1 - src/intel/vulkan/anv_descriptor_set.c | 6 +++--- src/intel/vulkan/anv_nir_apply_pipeline_layout.c | 7 ------- src/intel/vulkan/anv_nir_lower_ubo_loads.c | 2 +- 4 files changed, 4 insertions(+), 12 deletions(-) diff --git a/src/intel/compiler/intel_nir_blockify_uniform_loads.c b/src/intel/compiler/intel_nir_blockify_uniform_loads.c index 8fc2d07d129..c2f25bff260 100644 --- a/src/intel/compiler/intel_nir_blockify_uniform_loads.c +++ b/src/intel/compiler/intel_nir_blockify_uniform_loads.c @@ -91,7 +91,6 @@ intel_nir_blockify_uniform_loads_instr(nir_builder *b, return true; case nir_intrinsic_load_global_constant: - return false; if (nir_src_is_divergent(&intrin->src[0])) return false; diff --git a/src/intel/vulkan/anv_descriptor_set.c b/src/intel/vulkan/anv_descriptor_set.c index 07dd9d96d33..4b74b6ac180 100644 --- a/src/intel/vulkan/anv_descriptor_set.c +++ b/src/intel/vulkan/anv_descriptor_set.c @@ -2473,9 +2473,9 @@ anv_descriptor_set_write_buffer(struct anv_device *device, /* We report a bounds checking alignment of 32B for the sake of block * messages which read an entire register worth at a time. */ - /* if (type == VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER || */ - /* type == VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC) */ - /* desc->bind_range = align64(desc->bind_range, ANV_UBO_ALIGNMENT); */ + if (type == VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER || + type == VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC) + desc->bind_range = align64(desc->bind_range, ANV_UBO_ALIGNMENT); if (data & ANV_DESCRIPTOR_INDIRECT_ADDRESS_RANGE) { struct anv_address_range_descriptor desc_data = { diff --git a/src/intel/vulkan/anv_nir_apply_pipeline_layout.c b/src/intel/vulkan/anv_nir_apply_pipeline_layout.c index 29bf01336c6..e2fefef1736 100644 --- a/src/intel/vulkan/anv_nir_apply_pipeline_layout.c +++ b/src/intel/vulkan/anv_nir_apply_pipeline_layout.c @@ -424,10 +424,6 @@ build_optimized_load_render_surface_state_address(nir_builder *b, nir_def *addr_udw = nir_channel(b, surface_addr, 1); nir_def *length = nir_channel(b, surface_addr, 3); - nir_printf_fmt(b, true, 64, "ubo_len=%u\n", - length); - - return nir_vec4(b, addr_ldw, addr_udw, length, nir_imm_int(b, 0)); } @@ -504,9 +500,6 @@ build_non_optimized_load_render_surface_state_address(nir_builder *b, length = nir_ior(b, length, nir_ishl_imm(b, depth, width_bits + height_bits)); length = nir_iadd_imm(b, length, 1); - nir_printf_fmt(b, true, 64, "ubo_len=%u\n", - length); - /* Check the surface type, if it's SURFTYPE_NULL, set the length of the * buffer to 0. */ diff --git a/src/intel/vulkan/anv_nir_lower_ubo_loads.c b/src/intel/vulkan/anv_nir_lower_ubo_loads.c index 7436b9eb083..49e6f15a719 100644 --- a/src/intel/vulkan/anv_nir_lower_ubo_loads.c +++ b/src/intel/vulkan/anv_nir_lower_ubo_loads.c @@ -44,7 +44,7 @@ lower_ubo_load_instr(nir_builder *b, nir_intrinsic_instr *load, unsigned byte_size = bit_size / 8; nir_def *val; - if (!nir_src_is_divergent(&load->src[0]) && nir_src_is_const(load->src[1]) && false) { + if (!nir_src_is_divergent(&load->src[0]) && nir_src_is_const(load->src[1])) { uint32_t offset = nir_src_as_uint(load->src[1]); /* Things should be component-aligned. */