diff --git a/src/intel/compiler/brw_compiler.h b/src/intel/compiler/brw_compiler.h index f24db8caef0..ea508940a04 100644 --- a/src/intel/compiler/brw_compiler.h +++ b/src/intel/compiler/brw_compiler.h @@ -679,6 +679,8 @@ enum brw_shader_reloc_id { BRW_SHADER_RELOC_CONST_DATA_ADDR_LOW, BRW_SHADER_RELOC_CONST_DATA_ADDR_HIGH, BRW_SHADER_RELOC_SHADER_START_OFFSET, + BRW_SHADER_RELOC_RESUME_SBT_ADDR_LOW, + BRW_SHADER_RELOC_RESUME_SBT_ADDR_HIGH, }; enum brw_shader_reloc_type { diff --git a/src/intel/compiler/brw_nir_lower_rt_intrinsics.c b/src/intel/compiler/brw_nir_lower_rt_intrinsics.c index 55f3eb3e31d..05efaab59db 100644 --- a/src/intel/compiler/brw_nir_lower_rt_intrinsics.c +++ b/src/intel/compiler/brw_nir_lower_rt_intrinsics.c @@ -337,8 +337,9 @@ lower_rt_intrinsics_impl(nir_function_impl *impl, break; case nir_intrinsic_load_btd_resume_sbt_addr_intel: - /* The call stack handler is just the first in our resume SBT */ - sysval = globals.resume_sbt_addr; + sysval = nir_pack_64_2x32_split(b, + nir_load_reloc_const_intel(b, BRW_SHADER_RELOC_RESUME_SBT_ADDR_LOW), + nir_load_reloc_const_intel(b, BRW_SHADER_RELOC_RESUME_SBT_ADDR_HIGH)); break; case nir_intrinsic_load_leaf_procedural_intel: diff --git a/src/intel/compiler/brw_nir_lower_shader_calls.c b/src/intel/compiler/brw_nir_lower_shader_calls.c index 9880f4f8396..f06e26d27cd 100644 --- a/src/intel/compiler/brw_nir_lower_shader_calls.c +++ b/src/intel/compiler/brw_nir_lower_shader_calls.c @@ -330,8 +330,7 @@ rewrite_instr_src_from_phi_builder(nir_src *src, void *_pbv_arr) } static void -spill_ssa_defs_and_lower_shader_calls(nir_shader *shader, uint32_t num_calls, - uint32_t first_resume_sbt_idx) +spill_ssa_defs_and_lower_shader_calls(nir_shader *shader, uint32_t num_calls) { /* TODO: If a SSA def is filled more than once, we probably want to just * spill it at the LCM of the fill sites so we avoid unnecessary @@ -508,8 +507,7 @@ spill_ssa_defs_and_lower_shader_calls(nir_shader *shader, uint32_t num_calls, nir_intrinsic_instr *call = nir_instr_as_intrinsic(instr); nir_ssa_def *resume_record_addr = nir_iadd_imm(b, nir_load_btd_resume_sbt_addr_intel(b), - (first_resume_sbt_idx + call_idx) * - BRW_BTD_RESUME_SBT_STRIDE); + call_idx * BRW_BTD_RESUME_SBT_STRIDE); /* By the time we get here, any remaining shader/function memory * pointers have been lowered to SSA values. */ @@ -1206,7 +1204,6 @@ replace_resume_with_halt(nir_shader *shader, nir_instr *keep) */ bool brw_nir_lower_shader_calls(nir_shader *shader, - uint32_t first_resume_sbt_idx, nir_shader ***resume_shaders_out, uint32_t *num_resume_shaders_out, void *mem_ctx) @@ -1241,8 +1238,7 @@ brw_nir_lower_shader_calls(nir_shader *shader, NIR_PASS(progress, shader, nir_opt_cse); } - NIR_PASS_V(shader, spill_ssa_defs_and_lower_shader_calls, - num_calls, first_resume_sbt_idx); + NIR_PASS_V(shader, spill_ssa_defs_and_lower_shader_calls, num_calls); /* Make N copies of our shader */ nir_shader **resume_shaders = ralloc_array(mem_ctx, nir_shader *, num_calls); diff --git a/src/intel/compiler/brw_nir_rt.h b/src/intel/compiler/brw_nir_rt.h index 2c48aa1d4de..2332fdd42a6 100644 --- a/src/intel/compiler/brw_nir_rt.h +++ b/src/intel/compiler/brw_nir_rt.h @@ -52,7 +52,6 @@ void brw_nir_lower_combined_intersection_any_hit(nir_shader *intersection, void brw_nir_lower_shader_returns(nir_shader *shader); bool brw_nir_lower_shader_calls(nir_shader *shader, - uint32_t first_resume_sbt_idx, nir_shader ***resume_shaders_out, uint32_t *num_resume_shaders_out, void *mem_ctx);