aco: implement load_shared2_amd/store_shared2_amd

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13778>
This commit is contained in:
Rhys Perry
2021-11-12 10:28:13 +00:00
committed by Marge Bot
parent 5aa5af7776
commit c883abda76
2 changed files with 63 additions and 0 deletions
@@ -725,6 +725,7 @@ init_context(isel_context* ctx, nir_shader* shader)
case nir_intrinsic_load_cull_small_prim_precision_amd:
case nir_intrinsic_load_vector_arg_amd: type = RegType::vgpr; break;
case nir_intrinsic_load_shared:
case nir_intrinsic_load_shared2_amd:
/* When the result of these loads is only used by cross-lane instructions,
* it is beneficial to use a VGPR destination. This is because this allows
* to put the s_waitcnt further down, which decreases latency.