diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp index cc0135229eb..5aea644f342 100644 --- a/src/intel/compiler/brw_fs_nir.cpp +++ b/src/intel/compiler/brw_fs_nir.cpp @@ -3773,9 +3773,9 @@ fs_visitor::nir_emit_cs_intrinsic(const fs_builder &bld, dest.type = brw_reg_type_from_bit_size(bit_size, BRW_REGISTER_TYPE_UD); /* Read the vector */ - assert(nir_dest_bit_size(instr->dest) <= 32); + assert(bit_size <= 32); assert(nir_intrinsic_align(instr) > 0); - if (nir_dest_bit_size(instr->dest) == 32 && + if (bit_size == 32 && nir_intrinsic_align(instr) >= 4) { assert(nir_dest_num_components(instr->dest) <= 4); srcs[SURFACE_LOGICAL_SRC_IMM_ARG] = brw_imm_ud(instr->num_components); @@ -3821,11 +3821,11 @@ fs_visitor::nir_emit_cs_intrinsic(const fs_builder &bld, fs_reg data = get_nir_src(instr->src[0]); data.type = brw_reg_type_from_bit_size(bit_size, BRW_REGISTER_TYPE_UD); - assert(nir_src_bit_size(instr->src[0]) <= 32); + assert(bit_size <= 32); assert(nir_intrinsic_write_mask(instr) == (1u << instr->num_components) - 1); assert(nir_intrinsic_align(instr) > 0); - if (nir_src_bit_size(instr->src[0]) == 32 && + if (bit_size == 32 && nir_intrinsic_align(instr) >= 4) { assert(nir_src_num_components(instr->src[0]) <= 4); srcs[SURFACE_LOGICAL_SRC_DATA] = data; @@ -5066,7 +5066,7 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr bld.MOV(tmp, retype(get_nir_src(instr->src[0]), data_type)); srcs[A64_LOGICAL_SRC] = tmp; - srcs[A64_LOGICAL_ARG] = brw_imm_ud(nir_src_bit_size(instr->src[0])); + srcs[A64_LOGICAL_ARG] = brw_imm_ud(bit_size); bld.emit(SHADER_OPCODE_A64_BYTE_SCATTERED_WRITE_LOGICAL, fs_reg(), srcs, A64_LOGICAL_NUM_SRCS); @@ -5199,9 +5199,9 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr dest.type = brw_reg_type_from_bit_size(bit_size, BRW_REGISTER_TYPE_UD); /* Read the vector */ - assert(nir_dest_bit_size(instr->dest) <= 32); + assert(bit_size <= 32); assert(nir_intrinsic_align(instr) > 0); - if (nir_dest_bit_size(instr->dest) == 32 && + if (bit_size == 32 && nir_intrinsic_align(instr) >= 4) { assert(nir_dest_num_components(instr->dest) <= 4); srcs[SURFACE_LOGICAL_SRC_IMM_ARG] = brw_imm_ud(instr->num_components); @@ -5237,11 +5237,11 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr fs_reg data = get_nir_src(instr->src[0]); data.type = brw_reg_type_from_bit_size(bit_size, BRW_REGISTER_TYPE_UD); - assert(nir_src_bit_size(instr->src[0]) <= 32); + assert(bit_size <= 32); assert(nir_intrinsic_write_mask(instr) == (1u << instr->num_components) - 1); assert(nir_intrinsic_align(instr) > 0); - if (nir_src_bit_size(instr->src[0]) == 32 && + if (bit_size == 32 && nir_intrinsic_align(instr) >= 4) { assert(nir_src_num_components(instr->src[0]) <= 4); srcs[SURFACE_LOGICAL_SRC_DATA] = data; @@ -5440,12 +5440,12 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr /* Read the vector */ assert(nir_dest_num_components(instr->dest) == 1); - assert(nir_dest_bit_size(instr->dest) <= 32); + assert(bit_size <= 32); assert(nir_intrinsic_align(instr) > 0); - if (nir_dest_bit_size(instr->dest) == 32 && + if (bit_size == 32 && nir_intrinsic_align(instr) >= 4) { if (devinfo->verx10 >= 125) { - assert(nir_dest_bit_size(instr->dest) == 32 && + assert(bit_size == 32 && nir_intrinsic_align(instr) >= 4); srcs[SURFACE_LOGICAL_SRC_ADDRESS] = @@ -5513,10 +5513,10 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr data.type = brw_reg_type_from_bit_size(bit_size, BRW_REGISTER_TYPE_UD); assert(nir_src_num_components(instr->src[0]) == 1); - assert(nir_src_bit_size(instr->src[0]) <= 32); + assert(bit_size <= 32); assert(nir_intrinsic_write_mask(instr) == 1); assert(nir_intrinsic_align(instr) > 0); - if (nir_src_bit_size(instr->src[0]) == 32 && + if (bit_size == 32 && nir_intrinsic_align(instr) >= 4) { if (devinfo->verx10 >= 125) { srcs[SURFACE_LOGICAL_SRC_DATA] = data;