From c1d310885514718e50887b80ab6eec91e301aa20 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Fri, 6 Jun 2025 18:01:02 -0400 Subject: [PATCH] radv: call radv_get_legacy_gs_info after ac_nir_lower_legacy_gs MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The pass will determíne the GSVS ring size, so radv_get_legacy_gs_info must be called after that. Reviewed-by: Samuel Pitoiset Reviewed-by: Timur Kristóf Part-of: --- src/amd/vulkan/radv_pipeline_graphics.c | 3 +++ src/amd/vulkan/radv_shader_info.c | 12 +++++------- src/amd/vulkan/radv_shader_info.h | 2 ++ 3 files changed, 10 insertions(+), 7 deletions(-) diff --git a/src/amd/vulkan/radv_pipeline_graphics.c b/src/amd/vulkan/radv_pipeline_graphics.c index 624622bdebc..6d996ce5c26 100644 --- a/src/amd/vulkan/radv_pipeline_graphics.c +++ b/src/amd/vulkan/radv_pipeline_graphics.c @@ -2802,6 +2802,9 @@ radv_graphics_shaders_compile(struct radv_device *device, struct vk_pipeline_cac } } + if (stages[MESA_SHADER_GEOMETRY].nir && !stages[MESA_SHADER_GEOMETRY].info.is_ngg) + radv_get_legacy_gs_info(device, &stages[MESA_SHADER_GEOMETRY].info); + /* Compile NIR shaders to AMD assembly. */ radv_graphics_shaders_nir_to_asm(device, cache, stages, gfx_state, keep_executable_info, keep_statistic_info, skip_shaders_cache, active_nir_stages, shaders, binaries, gs_copy_shader, diff --git a/src/amd/vulkan/radv_shader_info.c b/src/amd/vulkan/radv_shader_info.c index 2b7e95d85dc..ab89874779c 100644 --- a/src/amd/vulkan/radv_shader_info.c +++ b/src/amd/vulkan/radv_shader_info.c @@ -687,12 +687,12 @@ gather_shader_info_tes(struct radv_device *device, const nir_shader *nir, struct } } -static void +void radv_get_legacy_gs_info(const struct radv_device *device, struct radv_shader_info *gs_info) { const struct radv_physical_device *pdev = radv_device_physical(device); struct radv_legacy_gs_info *out = &gs_info->gs_ring_info; - const unsigned esgs_vertex_stride = radv_compute_esgs_itemsize(device, gs_info->gs.num_linked_inputs); + const unsigned esgs_vertex_stride = out->esgs_itemsize * 4; ac_legacy_gs_subgroup_info info; ac_legacy_gs_compute_subgroup_info(gs_info->gs.input_prim, gs_info->gs.vertices_out, gs_info->gs.invocations, @@ -704,7 +704,6 @@ radv_get_legacy_gs_info(const struct radv_device *device, struct radv_shader_inf out->gs_inst_prims_in_subgroup = info.gs_inst_prims_in_subgroup; out->es_verts_per_subgroup = info.es_verts_per_subgroup; out->gs_prims_per_subgroup = info.gs_prims_per_subgroup; - out->esgs_itemsize = esgs_vertex_stride / 4; out->lds_size = total_lds_bytes / lds_granularity; unsigned num_se = pdev->info.max_se; @@ -764,11 +763,10 @@ gather_shader_info_gs(struct radv_device *device, const nir_shader *nir, struct if (!info->inputs_linked) info->gs.num_linked_inputs = util_last_bit64(radv_gather_unlinked_io_mask(nir->info.inputs_read)); - if (info->is_ngg) { + if (info->is_ngg) gather_shader_info_ngg_query(device, info); - } else { - radv_get_legacy_gs_info(device, info); - } + else + info->gs_ring_info.esgs_itemsize = radv_compute_esgs_itemsize(device, info->gs.num_linked_inputs) / 4; } static void diff --git a/src/amd/vulkan/radv_shader_info.h b/src/amd/vulkan/radv_shader_info.h index 2a4996f14f8..9d9ad33a7f8 100644 --- a/src/amd/vulkan/radv_shader_info.h +++ b/src/amd/vulkan/radv_shader_info.h @@ -332,6 +332,8 @@ void radv_nir_shader_info_pass(struct radv_device *device, const struct nir_shad const enum radv_pipeline_type pipeline_type, bool consider_force_vrs, struct radv_shader_info *info); +void radv_get_legacy_gs_info(const struct radv_device *device, struct radv_shader_info *gs_info); + void gfx10_get_ngg_info(const struct radv_device *device, struct radv_shader_info *es_info, struct radv_shader_info *gs_info, struct gfx10_ngg_info *out);