diff --git a/src/asahi/libagx/draws.cl b/src/asahi/libagx/draws.cl
index e2edfb64fa7..40efeb85437 100644
--- a/src/asahi/libagx/draws.cl
+++ b/src/asahi/libagx/draws.cl
@@ -49,7 +49,7 @@ libagx_draw_without_adj(global VkDrawIndirectCommand *out,
       uint offs = in->firstVertex;
 
       ia->index_buffer = libagx_index_buffer(
-         index_buffer, index_buffer_range_el, offs, index_size_B, 0);
+         index_buffer, index_buffer_range_el, offs, index_size_B);
 
       ia->index_buffer_range_el =
          libagx_index_buffer_range_el(index_buffer_range_el, offs);
diff --git a/src/asahi/libagx/geometry.cl b/src/asahi/libagx/geometry.cl
index 9dfe6c4cb6f..347fa6d7588 100644
--- a/src/asahi/libagx/geometry.cl
+++ b/src/asahi/libagx/geometry.cl
@@ -460,9 +460,8 @@ setup_unroll_for_draw(global struct agx_geometry_state *heap,
 KERNEL(1024)
 libagx_unroll_restart(global struct agx_geometry_state *heap,
                       uint64_t index_buffer, constant uint *in_draw,
-                      global uint32_t *out_draw, uint64_t zero_sink,
-                      uint32_t max_draws, uint32_t restart_index,
-                      uint32_t index_buffer_size_el,
+                      global uint32_t *out_draw, uint32_t max_draws,
+                      uint32_t restart_index, uint32_t index_buffer_size_el,
                       uint32_t index_size_log2__3, uint32_t flatshade_first,
                       uint mode__11)
 {
@@ -480,7 +479,7 @@ libagx_unroll_restart(global struct agx_geometry_state *heap,
    barrier(CLK_LOCAL_MEM_FENCE);
 
    uintptr_t in_ptr = (uintptr_t)(libagx_index_buffer(
-      index_buffer, index_buffer_size_el, in_draw[2], index_size_B, zero_sink));
+      index_buffer, index_buffer_size_el, in_draw[2], index_size_B));
 
    local uint scratch[32];
 
@@ -613,7 +612,7 @@ libagx_gs_setup_indirect(
    uint64_t index_buffer, constant uint *draw,
    global uintptr_t *vertex_buffer /* output */,
    global struct agx_ia_state *ia /* output */,
-   global struct agx_geometry_params *p /* output */, uint64_t zero_sink,
+   global struct agx_geometry_params *p /* output */,
    uint64_t vs_outputs /* Vertex (TES) output mask */,
    uint32_t index_size_B /* 0 if no index bffer */,
    uint32_t index_buffer_range_el,
@@ -645,7 +644,7 @@ libagx_gs_setup_indirect(
     */
    if (index_size_B) {
       ia->index_buffer = libagx_index_buffer(
-         index_buffer, index_buffer_range_el, draw[2], index_size_B, zero_sink);
+         index_buffer, index_buffer_range_el, draw[2], index_size_B);
 
       ia->index_buffer_range_el =
          libagx_index_buffer_range_el(index_buffer_range_el, draw[2]);
diff --git a/src/asahi/libagx/geometry.h b/src/asahi/libagx/geometry.h
index 46caae94ee9..42b3d7d2845 100644
--- a/src/asahi/libagx/geometry.h
+++ b/src/asahi/libagx/geometry.h
@@ -4,6 +4,7 @@
  * SPDX-License-Identifier: MIT
  */
 
+#include "asahi/lib/agx_abi.h"
 #include "compiler/libcl/libcl.h"
 #include "compiler/shader_enums.h"
 
@@ -56,12 +57,12 @@ static_assert(sizeof(struct agx_ia_state) == 4 * 4);
 
 static inline uint64_t
 libagx_index_buffer(uint64_t index_buffer, uint size_el, uint offset_el,
-                    uint elsize_B, uint64_t zero_sink)
+                    uint elsize_B)
 {
    if (offset_el < size_el)
       return index_buffer + (offset_el * elsize_B);
    else
-      return zero_sink;
+      return AGX_ZERO_PAGE_ADDRESS;
 }
 
 static inline uint
diff --git a/src/asahi/libagx/tessellation.cl b/src/asahi/libagx/tessellation.cl
index 34c919e8e14..47275325edf 100644
--- a/src/asahi/libagx/tessellation.cl
+++ b/src/asahi/libagx/tessellation.cl
@@ -204,7 +204,7 @@ libagx_tess_setup_indirect(
    if (in_index_size_B) {
       ia->index_buffer =
          libagx_index_buffer(in_index_buffer, in_index_buffer_range_el,
-                             indirect[2], in_index_size_B, 0);
+                             indirect[2], in_index_size_B);
 
       ia->index_buffer_range_el =
          libagx_index_buffer_range_el(in_index_buffer_range_el, indirect[2]);
diff --git a/src/asahi/vulkan/hk_cmd_draw.c b/src/asahi/vulkan/hk_cmd_draw.c
index 1a32a2f88b2..a4b871bd867 100644
--- a/src/asahi/vulkan/hk_cmd_draw.c
+++ b/src/asahi/vulkan/hk_cmd_draw.c
@@ -1063,7 +1063,6 @@ hk_geometry_state(struct hk_cmd_buffer *cmd)
 static uint64_t
 hk_upload_ia_params(struct hk_cmd_buffer *cmd, struct agx_draw draw)
 {
-   struct hk_device *dev = hk_cmd_buffer_device(cmd);
    assert(!agx_is_indirect(draw.b) && "indirect params written by GPU");
 
    struct agx_ia_state ia = {.verts_per_instance = draw.b.count[0]};
@@ -1072,9 +1071,8 @@ hk_upload_ia_params(struct hk_cmd_buffer *cmd, struct agx_draw draw)
       unsigned index_size_B = agx_index_size_to_B(draw.index_size);
       unsigned range_el = agx_draw_index_range_el(draw);
 
-      ia.index_buffer =
-         libagx_index_buffer(agx_draw_index_buffer(draw), range_el, 0,
-                             index_size_B, dev->rodata.zero_sink);
+      ia.index_buffer = libagx_index_buffer(agx_draw_index_buffer(draw),
+                                            range_el, 0, index_size_B);
 
       ia.index_buffer_range_el = range_el;
    }
@@ -1387,7 +1385,6 @@ hk_draw_without_restart(struct hk_cmd_buffer *cmd, struct hk_cs *cs,
       .index_buffer_size_el = agx_draw_index_range_el(draw),
       .flatshade_first =
          dyn->rs.provoking_vertex == VK_PROVOKING_VERTEX_MODE_FIRST_VERTEX_EXT,
-      .zero_sink = dev->rodata.zero_sink,
    };
 
    libagx_unroll_restart_struct(cs, agx_1d(1024 * draw_count), AGX_BARRIER_ALL,
@@ -1439,7 +1436,6 @@ hk_launch_gs_prerast(struct hk_cmd_buffer *cmd, struct hk_cs *cs,
    if (agx_is_indirect(draw.b)) {
       struct libagx_gs_setup_indirect_args gsi = {
          .index_buffer = draw.index_buffer,
-         .zero_sink = dev->rodata.zero_sink,
          .draw = draw.b.ptr,
          .ia = desc->root.draw.input_assembly,
          .p = desc->root.draw.geometry_params,