aco/spill: pass live_vars to spill_ctx
We will use them in future commits. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27799>
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bfb62fa70d
@@ -73,7 +73,7 @@ struct spill_ctx {
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Program* program;
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aco::monotonic_buffer_resource memory;
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std::vector<std::vector<RegisterDemand>> register_demand;
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live& live_vars;
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std::vector<aco::map<Temp, Temp>> renames;
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std::vector<aco::unordered_map<Temp, uint32_t>> spills_entry;
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std::vector<aco::unordered_map<Temp, uint32_t>> spills_exit;
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@@ -96,10 +96,8 @@ struct spill_ctx {
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unsigned vgpr_spill_slots;
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Temp scratch_rsrc;
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spill_ctx(const RegisterDemand target_pressure_, Program* program_,
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std::vector<std::vector<RegisterDemand>> register_demand_)
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: target_pressure(target_pressure_), program(program_), memory(),
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register_demand(std::move(register_demand_)),
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spill_ctx(const RegisterDemand target_pressure_, Program* program_, live& live_vars_)
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: target_pressure(target_pressure_), program(program_), memory(), live_vars(live_vars_),
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renames(program->blocks.size(), aco::map<Temp, Temp>(memory)),
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spills_entry(program->blocks.size(), aco::unordered_map<Temp, uint32_t>(memory)),
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spills_exit(program->blocks.size(), aco::unordered_map<Temp, uint32_t>(memory)),
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@@ -456,12 +454,12 @@ RegisterDemand
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get_demand_before(spill_ctx& ctx, unsigned block_idx, unsigned idx)
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{
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if (idx == 0) {
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RegisterDemand demand = ctx.register_demand[block_idx][idx];
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RegisterDemand demand = ctx.live_vars.register_demand[block_idx][idx];
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aco_ptr<Instruction>& instr = ctx.program->blocks[block_idx].instructions[idx];
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aco_ptr<Instruction> instr_before(nullptr);
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return get_demand_before(demand, instr, instr_before);
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} else {
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return ctx.register_demand[block_idx][idx - 1];
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return ctx.live_vars.register_demand[block_idx][idx - 1];
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}
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}
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@@ -491,7 +489,7 @@ get_live_in_demand(spill_ctx& ctx, unsigned block_idx)
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* reg_pressure if the branch instructions define sgprs. */
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for (unsigned pred : block.linear_preds)
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reg_pressure.sgpr =
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std::max<int16_t>(reg_pressure.sgpr, ctx.register_demand[pred].back().sgpr);
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std::max<int16_t>(reg_pressure.sgpr, ctx.live_vars.register_demand[pred].back().sgpr);
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return reg_pressure;
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}
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@@ -768,7 +766,7 @@ add_coupling_code(spill_ctx& ctx, Block* block, unsigned block_idx)
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if (block->linear_preds.size() == 1 &&
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!(block->kind & (block_kind_loop_exit | block_kind_loop_header))) {
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assert(ctx.processed[block->linear_preds[0]]);
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assert(ctx.register_demand[block_idx].size() == block->instructions.size());
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assert(ctx.live_vars.register_demand[block_idx].size() == block->instructions.size());
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ctx.renames[block_idx] = ctx.renames[block->linear_preds[0]];
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if (!block->logical_preds.empty() && block->logical_preds[0] != block->linear_preds[0]) {
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@@ -1078,10 +1076,11 @@ add_coupling_code(spill_ctx& ctx, Block* block, unsigned block_idx)
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if (!ctx.processed[block_idx]) {
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assert(!(block->kind & block_kind_loop_header));
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RegisterDemand demand_before = get_demand_before(ctx, block_idx, idx);
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ctx.register_demand[block->index].erase(ctx.register_demand[block->index].begin(),
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ctx.register_demand[block->index].begin() + idx);
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ctx.register_demand[block->index].insert(ctx.register_demand[block->index].begin(),
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instructions.size(), demand_before);
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ctx.live_vars.register_demand[block->index].erase(
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ctx.live_vars.register_demand[block->index].begin(),
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ctx.live_vars.register_demand[block->index].begin() + idx);
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ctx.live_vars.register_demand[block->index].insert(
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ctx.live_vars.register_demand[block->index].begin(), instructions.size(), demand_before);
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}
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std::vector<aco_ptr<Instruction>>::iterator start = std::next(block->instructions.begin(), idx);
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@@ -1157,7 +1156,7 @@ process_block(spill_ctx& ctx, unsigned block_idx, Block* block, RegisterDemand s
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/* check if register demand is low enough before and after the current instruction */
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if (block->register_demand.exceeds(ctx.target_pressure)) {
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RegisterDemand new_demand = ctx.register_demand[block_idx][idx];
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RegisterDemand new_demand = ctx.live_vars.register_demand[block_idx][idx];
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new_demand.update(get_demand_before(ctx, block_idx, idx));
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assert(!ctx.local_next_use_distance.empty());
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@@ -1866,7 +1865,7 @@ spill(Program* program, live& live_vars)
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const RegisterDemand target(vgpr_limit - extra_vgprs, sgpr_limit - extra_sgprs);
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/* initialize ctx */
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spill_ctx ctx(target, program, live_vars.register_demand);
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spill_ctx ctx(target, program, live_vars);
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compute_global_next_uses(ctx);
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get_rematerialize_info(ctx);
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