From be98fe27244ec65c117a408378d49b05f229c74e Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Mon, 29 Apr 2024 08:55:06 +0200 Subject: [PATCH] radv: pre-compute VGT_TF_PARAM.DISTRIBUTION_MODE For less CPU overhead. Signed-off-by: Samuel Pitoiset Part-of: --- src/amd/vulkan/radv_cmd_buffer.c | 13 ++----------- src/amd/vulkan/radv_physical_device.c | 9 +++++++++ src/amd/vulkan/radv_physical_device.h | 2 ++ 3 files changed, 13 insertions(+), 11 deletions(-) diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index ce68c541a4b..3f19e46d29e 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -4170,7 +4170,7 @@ radv_emit_tess_domain_origin(struct radv_cmd_buffer *cmd_buffer) const struct radv_physical_device *pdev = radv_device_physical(device); const struct radv_shader *tes = radv_get_shader(cmd_buffer->state.shaders, MESA_SHADER_TESS_EVAL); const struct radv_dynamic_state *d = &cmd_buffer->state.dynamic; - unsigned type = 0, partitioning = 0, distribution_mode = 0; + unsigned type = 0, partitioning = 0; unsigned topology; switch (tes->info.tes._primitive_mode) { @@ -4201,15 +4201,6 @@ radv_emit_tess_domain_origin(struct radv_cmd_buffer *cmd_buffer) unreachable("Invalid tess spacing type"); } - if (pdev->info.has_distributed_tess) { - if (pdev->info.family == CHIP_FIJI || pdev->info.family >= CHIP_POLARIS10) - distribution_mode = V_028B6C_TRAPEZOIDS; - else - distribution_mode = V_028B6C_DONUTS; - } else { - distribution_mode = V_028B6C_NO_DIST; - } - if (tes->info.tes.point_mode) { topology = V_028B6C_OUTPUT_POINT; } else if (tes->info.tes._primitive_mode == TESS_PRIMITIVE_ISOLINES) { @@ -4226,7 +4217,7 @@ radv_emit_tess_domain_origin(struct radv_cmd_buffer *cmd_buffer) radeon_set_context_reg(cmd_buffer->cs, R_028B6C_VGT_TF_PARAM, S_028B6C_TYPE(type) | S_028B6C_PARTITIONING(partitioning) | S_028B6C_TOPOLOGY(topology) | - S_028B6C_DISTRIBUTION_MODE(distribution_mode)); + S_028B6C_DISTRIBUTION_MODE(pdev->tess_distribution_mode)); } static void diff --git a/src/amd/vulkan/radv_physical_device.c b/src/amd/vulkan/radv_physical_device.c index 35ffb1f4ddc..94b9d49c63a 100644 --- a/src/amd/vulkan/radv_physical_device.c +++ b/src/amd/vulkan/radv_physical_device.c @@ -2167,6 +2167,15 @@ radv_physical_device_try_create(struct radv_instance *instance, drmDevicePtr drm ac_get_task_info(&pdev->info, &pdev->task_info); radv_get_binning_settings(pdev, &pdev->binning_settings); + if (pdev->info.has_distributed_tess) { + if (pdev->info.family == CHIP_FIJI || pdev->info.family >= CHIP_POLARIS10) + pdev->tess_distribution_mode = V_028B6C_TRAPEZOIDS; + else + pdev->tess_distribution_mode = V_028B6C_DONUTS; + } else { + pdev->tess_distribution_mode = V_028B6C_NO_DIST; + } + *pdev_out = pdev; return VK_SUCCESS; diff --git a/src/amd/vulkan/radv_physical_device.h b/src/amd/vulkan/radv_physical_device.h index ae4acc58f6e..df3d1797fd5 100644 --- a/src/amd/vulkan/radv_physical_device.h +++ b/src/amd/vulkan/radv_physical_device.h @@ -184,6 +184,8 @@ struct radv_physical_device { bool video_encode_enabled; struct radv_physical_device_cache_key cache_key; + + uint32_t tess_distribution_mode; }; VK_DEFINE_HANDLE_CASTS(radv_physical_device, vk.base, VkPhysicalDevice, VK_OBJECT_TYPE_PHYSICAL_DEVICE)