diff --git a/src/asahi/compiler/agx_dce.c b/src/asahi/compiler/agx_dce.c
index 25c53252847..929e1caa1aa 100644
--- a/src/asahi/compiler/agx_dce.c
+++ b/src/asahi/compiler/agx_dce.c
@@ -47,10 +47,17 @@ agx_dce(agx_context *ctx)
          bool needed = false;
 
          agx_foreach_dest(I, d) {
-            if (I->dest[d].type == AGX_INDEX_NORMAL)
-               needed |= BITSET_TEST(seen, I->dest[d].value);
-            else if (I->dest[d].type != AGX_INDEX_NULL)
-               needed = true;
+            /* Eliminate destinations that are never read, as RA needs to
+             * handle them specially. Visible only for instructions that write
+             * multiple destinations (splits) or that write a destination but
+             * cannot be DCE'd (atomics).
+             */
+            if ((I->dest[d].type == AGX_INDEX_NORMAL) &&
+                !BITSET_TEST(seen, I->dest[d].value))
+                  I->dest[d] = agx_null();
+
+            /* If the destination is actually needed, the instruction is too */
+            needed |= (I->dest[d].type != AGX_INDEX_NULL);
          }
 
          if (!needed) {