From bd8f8dda8cfcf8918c9a9842bf31da23deb45cee Mon Sep 17 00:00:00 2001 From: Rhys Perry Date: Wed, 11 May 2022 19:23:00 +0100 Subject: [PATCH] aco: fix p_constaddr with a non-zero offset MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Seems this broke a while ago and we never noticed. Signed-off-by: Rhys Perry Reviewed-by: Daniel Schürmann Fixes: 0af7ff49fde ("aco: lower p_constaddr into separate instructions earlier") Part-of: --- src/amd/compiler/aco_assembler.cpp | 6 ++++-- src/amd/compiler/aco_lower_to_hw_instr.cpp | 2 +- src/amd/compiler/tests/test_assembler.cpp | 2 +- 3 files changed, 6 insertions(+), 4 deletions(-) diff --git a/src/amd/compiler/aco_assembler.cpp b/src/amd/compiler/aco_assembler.cpp index a9357cf968c..a2b14afd98c 100644 --- a/src/amd/compiler/aco_assembler.cpp +++ b/src/amd/compiler/aco_assembler.cpp @@ -82,10 +82,12 @@ emit_instruction(asm_context& ctx, std::vector& out, Instruction* inst instr->opcode = aco_opcode::s_getpc_b64; instr->operands.pop_back(); } else if (instr->opcode == aco_opcode::p_constaddr_addlo) { - ctx.constaddrs[instr->operands[1].constantValue()].add_literal = out.size() + 1; + ctx.constaddrs[instr->operands[2].constantValue()].add_literal = out.size() + 1; instr->opcode = aco_opcode::s_add_u32; - instr->operands[1] = Operand::zero(); + instr->operands.pop_back(); + assert(instr->operands[1].isConstant()); + /* in case it's an inline constant, make it a literal */ instr->operands[1].setFixed(PhysReg(255)); } diff --git a/src/amd/compiler/aco_lower_to_hw_instr.cpp b/src/amd/compiler/aco_lower_to_hw_instr.cpp index 38a553b8572..72dce4ee072 100644 --- a/src/amd/compiler/aco_lower_to_hw_instr.cpp +++ b/src/amd/compiler/aco_lower_to_hw_instr.cpp @@ -2099,7 +2099,7 @@ lower_to_hw_instr(Program* program) PhysReg reg = instr->definitions[0].physReg(); bld.sop1(aco_opcode::p_constaddr_getpc, instr->definitions[0], Operand::c32(id)); bld.sop2(aco_opcode::p_constaddr_addlo, Definition(reg, s1), bld.def(s1, scc), - Operand(reg, s1), Operand::c32(id)); + Operand(reg, s1), instr->operands[0], Operand::c32(id)); bld.sop2(aco_opcode::s_addc_u32, Definition(reg.advance(4), s1), bld.def(s1, scc), Operand(reg.advance(4), s1), Operand::zero(), Operand(scc, s1)); break; diff --git a/src/amd/compiler/tests/test_assembler.cpp b/src/amd/compiler/tests/test_assembler.cpp index 5a1cde0787d..89359582355 100644 --- a/src/amd/compiler/tests/test_assembler.cpp +++ b/src/amd/compiler/tests/test_assembler.cpp @@ -222,7 +222,7 @@ BEGIN_TEST(assembler.long_jump.constaddr) //! s_add_u32 s0, s0, 0xe0 ; 8000ff00 000000e0 bld.sop1(aco_opcode::p_constaddr_getpc, Definition(PhysReg(0), s2), Operand::zero()); bld.sop2(aco_opcode::p_constaddr_addlo, Definition(PhysReg(0), s1), bld.def(s1, scc), - Operand(PhysReg(0), s1), Operand::zero()); + Operand(PhysReg(0), s1), Operand::zero(), Operand::zero()); program->blocks[2].linear_preds.push_back(0u); program->blocks[2].linear_preds.push_back(1u);