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anv: Implement VK_KHR_shader_atomic_int64

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Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
This commit is contained in:
Jason Ekstrand
2019-01-12 18:30:47 -06:00
committed by Jason Ekstrand
parent 79fb0d27f3
commit bd56ce8ce5
8 changed files with 51 additions and 5 deletions
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src/intel/compiler/brw_fs_nir.cpp
+15 -2
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@@ -4928,6 +4928,13 @@ fs_visitor::nir_emit_ssbo_atomic(const fs_builder &bld,
if (stage == MESA_SHADER_FRAGMENT)
brw_wm_prog_data(prog_data)->has_side_effects = true;
/* The BTI untyped atomic messages only support 32-bit atomics. If you
* just look at the big table of messages in the Vol 7 of the SKL PRM, they
* appear to exist. However, if you look at Vol 2a, there are no message
* descriptors provided for Qword atomic ops except for A64 messages.
*/
assert(nir_dest_bit_size(instr->dest) == 32);
fs_reg dest;
if (nir_intrinsic_infos[instr->intrinsic].has_dest)
dest = get_nir_dest(instr->dest);
@@ -5092,8 +5099,14 @@ fs_visitor::nir_emit_global_atomic(const fs_builder &bld,
data = tmp;
}
bld.emit(SHADER_OPCODE_A64_UNTYPED_ATOMIC_LOGICAL,
dest, addr, data, brw_imm_ud(op));
if (nir_dest_bit_size(instr->dest) == 64) {
bld.emit(SHADER_OPCODE_A64_UNTYPED_ATOMIC_INT64_LOGICAL,
dest, addr, data, brw_imm_ud(op));
} else {
assert(nir_dest_bit_size(instr->dest) == 32);
bld.emit(SHADER_OPCODE_A64_UNTYPED_ATOMIC_LOGICAL,
dest, addr, data, brw_imm_ud(op));
}
}
void