ac: properly document a buffer.store LLVM workaround
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
This commit is contained in:
@@ -760,10 +760,13 @@ ac_build_buffer_store_dword(struct ac_llvm_context *ctx,
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bool glc,
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bool slc,
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bool writeonly_memory,
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bool has_add_tid)
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bool swizzle_enable_hint)
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{
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/* TODO: Fix stores with ADD_TID and remove the "has_add_tid" flag. */
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if (!has_add_tid) {
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/* SWIZZLE_ENABLE requires that soffset isn't folded into voffset
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* (voffset is swizzled, but soffset isn't swizzled).
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* llvm.amdgcn.buffer.store doesn't have a separate soffset parameter.
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*/
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if (!swizzle_enable_hint) {
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/* Split 3 channel stores, becase LLVM doesn't support 3-channel
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* intrinsics. */
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if (num_channels == 3) {
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@@ -777,11 +780,11 @@ ac_build_buffer_store_dword(struct ac_llvm_context *ctx,
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ac_build_buffer_store_dword(ctx, rsrc, v01, 2, voffset,
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soffset, inst_offset, glc, slc,
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writeonly_memory, has_add_tid);
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writeonly_memory, swizzle_enable_hint);
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ac_build_buffer_store_dword(ctx, rsrc, v[2], 1, voffset,
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soffset, inst_offset + 8,
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glc, slc,
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writeonly_memory, has_add_tid);
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writeonly_memory, swizzle_enable_hint);
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return;
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}
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@@ -170,7 +170,7 @@ ac_build_buffer_store_dword(struct ac_llvm_context *ctx,
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bool glc,
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bool slc,
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bool writeonly_memory,
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bool has_add_tid);
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bool swizzle_enable_hint);
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LLVMValueRef
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ac_build_buffer_load(struct ac_llvm_context *ctx,
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LLVMValueRef rsrc,
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