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anv/iris: centralize TBIMR drirc

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Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33795>
This commit is contained in:
Lionel Landwerlin
2025-02-27 11:07:19 +02:00
committed by Marge Bot
parent af1b4f61b5
commit bbade676f4
3 changed files with 5 additions and 2 deletions
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src/intel/vulkan/anv_instance.c
+1 -1
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@@ -32,7 +32,7 @@ static const driOptionDescription anv_dri_options[] = {
DRI_CONF_ANV_QUERY_COPY_WITH_SHADER_THRESHOLD(6)
DRI_CONF_ANV_FORCE_INDIRECT_DESCRIPTORS(false)
DRI_CONF_SHADER_SPILLING_RATE(11)
DRI_CONF_OPT_B(intel_tbimr, true, "Enable TBIMR tiled rendering")
DRI_CONFIG_INTEL_TBIMR(true)
DRI_CONF_ANV_COMPRESSION_CONTROL_ENABLED(false)
DRI_CONF_ANV_FAKE_NONLOCAL_MEMORY(false)
DRI_CONF_OPT_E(intel_stack_id, 512, 256, 2048,