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radeonsi: implement nir_intrinsic_load_tess_rel_patch_id_amd for both tcs and tes

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radv will lower this intrinsic before gets to llvm, so we just need to
implement it in radeonsi.

The tes version will be used in tess lower too.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16705>
This commit is contained in:
Qiang Yu
2022-05-24 15:09:00 +08:00
committed by Marge Bot
parent 3853dfcd44
commit baaeca7d1a
4 changed files with 11 additions and 10 deletions
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src/amd/llvm/ac_nir_to_llvm.c
+1 -4
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@@ -3631,6 +3631,7 @@ static void visit_intrinsic(struct ac_nir_context *ctx, nir_intrinsic_instr *ins
case nir_intrinsic_load_tess_level_inner:
case nir_intrinsic_load_tess_level_outer_default:
case nir_intrinsic_load_tess_level_inner_default:
case nir_intrinsic_load_tess_rel_patch_id_amd:
case nir_intrinsic_load_patch_vertices_in:
case nir_intrinsic_load_sample_mask_in:
case nir_intrinsic_load_ring_tess_factors_amd:
@@ -4050,10 +4051,6 @@ static void visit_intrinsic(struct ac_nir_context *ctx, nir_intrinsic_instr *ins
result = ac_build_gather_values(&ctx->ac, coord, 3);
break;
}
case nir_intrinsic_load_tess_rel_patch_id_amd:
assert(ctx->stage == MESA_SHADER_TESS_CTRL);
result = ac_unpack_param(&ctx->ac, ac_get_arg(&ctx->ac, ctx->args->tcs_rel_ids), 0, 8);
break;
case nir_intrinsic_vote_all: {
result = ac_build_vote_all(&ctx->ac, get_src(ctx, instr->src[0]));
break;