brw: move barycentric_mode enum to intel_shader_enums.h
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Tapani Pälli <tapani.palli@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32329>
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@@ -173,12 +173,12 @@ setup_fs_payload_gfx20(fs_thread_payload &payload,
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for (unsigned j = 0; j < v.dispatch_width / payload_width; j++) {
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/* R2-13: Barycentric interpolation coordinates. These appear
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* in the same order that they appear in the brw_barycentric_mode
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* in the same order that they appear in the intel_barycentric_mode
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* enum. Each set of coordinates occupies 2 64B registers per
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* SIMD16 half. Coordinates only appear if they were enabled
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* using the "Barycentric Interpolation Mode" bits in WM_STATE.
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*/
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for (int i = 0; i < BRW_BARYCENTRIC_MODE_COUNT; ++i) {
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for (int i = 0; i < INTEL_BARYCENTRIC_MODE_COUNT; ++i) {
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if (prog_data->barycentric_interp_modes & (1 << i)) {
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payload.barycentric_coord_reg[i][j] = payload.num_regs;
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payload.num_regs += payload_width / 4;
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@@ -267,13 +267,13 @@ setup_fs_payload_gfx9(fs_thread_payload &payload,
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for (unsigned j = 0; j < v.dispatch_width / payload_width; j++) {
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/* R3-26: barycentric interpolation coordinates. These appear in the
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* same order that they appear in the brw_barycentric_mode enum. Each
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* same order that they appear in the intel_barycentric_mode enum. Each
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* set of coordinates occupies 2 registers if dispatch width == 8 and 4
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* registers if dispatch width == 16. Coordinates only appear if they
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* were enabled using the "Barycentric Interpolation Mode" bits in
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* WM_STATE.
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*/
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for (int i = 0; i < BRW_BARYCENTRIC_MODE_COUNT; ++i) {
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for (int i = 0; i < INTEL_BARYCENTRIC_MODE_COUNT; ++i) {
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if (prog_data->barycentric_interp_modes & (1 << i)) {
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payload.barycentric_coord_reg[i][j] = payload.num_regs;
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payload.num_regs += payload_width / 4;
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