From ba03e6734cf3530ebdd3e9da94278f0c77f3adb8 Mon Sep 17 00:00:00 2001 From: Lionel Landwerlin Date: Sat, 14 Dec 2024 02:07:34 +0200 Subject: [PATCH] isl: select a tiling for shader detiling Signed-off-by: Lionel Landwerlin Reviewed-by: Nanley Chery Part-of: --- src/intel/isl/isl.c | 13 +++++++++++++ src/intel/isl/isl.h | 7 +++++++ src/intel/isl/isl_gfx12.c | 3 +++ src/intel/isl/isl_gfx20.c | 3 +++ src/intel/isl/isl_gfx4.c | 5 ++++- src/intel/isl/isl_gfx7.c | 3 +++ 6 files changed, 33 insertions(+), 1 deletion(-) diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c index 3f36c57a1c1..00f879ebe78 100644 --- a/src/intel/isl/isl.c +++ b/src/intel/isl/isl.c @@ -426,6 +426,19 @@ isl_device_init(struct isl_device *dev, dev->emit_depth_stencil_hiz_s = isl_emit_depth_stencil_hiz_s_get_func(dev); dev->null_fill_state_s = isl_null_fill_state_s_get_func(dev); dev->emit_cpb_control_s = isl_emit_cpb_control_s_get_func(dev); + + isl_tiling_flags_t supported_tilings = isl_device_get_supported_tilings(dev); +#define CHOOSE(__tiling) \ + if ((1u << __tiling) & supported_tilings) { \ + dev->shader_tiling = __tiling; \ + break; \ + } + do { + CHOOSE(ISL_TILING_4); + CHOOSE(ISL_TILING_Y0); + unreachable("Cannot find shader tiling"); + } while (0); +#undef CHOOSE } /** diff --git a/src/intel/isl/isl.h b/src/intel/isl/isl.h index 9d51dd3c8d4..cdfa60073ba 100644 --- a/src/intel/isl/isl.h +++ b/src/intel/isl/isl.h @@ -1291,6 +1291,13 @@ struct isl_device { bool use_separate_stencil; bool has_bit6_swizzling; + /** + * Tiling use for software detiling in shaders + * + * Used to implement image 64bits atomic + */ + enum isl_tiling shader_tiling; + /** * Describes the layout of a RENDER_SURFACE_STATE structure for the * current gen. diff --git a/src/intel/isl/isl_gfx12.c b/src/intel/isl/isl_gfx12.c index cba84fea7e8..0b13dfad94a 100644 --- a/src/intel/isl/isl_gfx12.c +++ b/src/intel/isl/isl_gfx12.c @@ -46,6 +46,9 @@ isl_gfx125_filter_tiling(const struct isl_device *dev, *flags &= isl_device_get_supported_tilings(dev); + if (info->usage & ISL_SURF_USAGE_SOFTWARE_DETILING) + *flags &= (1 << dev->shader_tiling) | ISL_TILING_LINEAR_BIT; + if (isl_surf_usage_is_depth_or_stencil(info->usage)) { *flags &= ISL_TILING_4_BIT | ISL_TILING_64_BIT; diff --git a/src/intel/isl/isl_gfx20.c b/src/intel/isl/isl_gfx20.c index d20365d4d8c..753b0864084 100644 --- a/src/intel/isl/isl_gfx20.c +++ b/src/intel/isl/isl_gfx20.c @@ -46,6 +46,9 @@ isl_gfx20_filter_tiling(const struct isl_device *dev, *flags &= isl_device_get_supported_tilings(dev); + if (info->usage & ISL_SURF_USAGE_SOFTWARE_DETILING) + *flags &= (1 << dev->shader_tiling) | ISL_TILING_LINEAR_BIT; + if (isl_surf_usage_is_depth_or_stencil(info->usage)) { *flags &= ISL_TILING_4_BIT | ISL_TILING_64_XE2_BIT; diff --git a/src/intel/isl/isl_gfx4.c b/src/intel/isl/isl_gfx4.c index fc3022cbbae..02b2f3dc0bf 100644 --- a/src/intel/isl/isl_gfx4.c +++ b/src/intel/isl/isl_gfx4.c @@ -42,7 +42,10 @@ isl_gfx4_filter_tiling(const struct isl_device *dev, const struct isl_surf_init_info *restrict info, isl_tiling_flags_t *flags) { - *flags &= isl_device_get_supported_tilings(dev);; + *flags &= isl_device_get_supported_tilings(dev); + + if (info->usage & ISL_SURF_USAGE_SOFTWARE_DETILING) + *flags &= (1 << dev->shader_tiling) | ISL_TILING_LINEAR_BIT; if (isl_surf_usage_is_depth_or_stencil(info->usage)) { assert(!ISL_DEV_USE_SEPARATE_STENCIL(dev)); diff --git a/src/intel/isl/isl_gfx7.c b/src/intel/isl/isl_gfx7.c index aa07fa9806c..6fc58ecd7fe 100644 --- a/src/intel/isl/isl_gfx7.c +++ b/src/intel/isl/isl_gfx7.c @@ -201,6 +201,9 @@ isl_gfx6_filter_tiling(const struct isl_device *dev, *flags &= isl_device_get_supported_tilings(dev); + if (info->usage & ISL_SURF_USAGE_SOFTWARE_DETILING) + *flags &= (1 << dev->shader_tiling) | ISL_TILING_LINEAR_BIT; + /* TODO: Investigate Yf failures (~5000 VK CTS failures at the time of this * writing). */