From b91319d9520e2d36f9416f7699af46b5faf9d17c Mon Sep 17 00:00:00 2001
From: Rob Clark <robdclark@chromium.org>
Date: Mon, 21 Dec 2020 11:08:05 -0800
Subject: [PATCH] freedreno/ir3: Tweak ldib/resinfo encoding

The blob is using '0' for the low bit in these (except for ldib where it
seems to randomly use either '0' or '1').  The upcoming xml based ISA
spec maps this bit to 'dontcare' in the ldib case.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8175>
---
 src/freedreno/ir3/ir3.c | 6 +-----
 1 file changed, 1 insertion(+), 5 deletions(-)

diff --git a/src/freedreno/ir3/ir3.c b/src/freedreno/ir3/ir3.c
index 6308bf27424..62f45fcd722 100644
--- a/src/freedreno/ir3/ir3.c
+++ b/src/freedreno/ir3/ir3.c
@@ -653,13 +653,9 @@ static int emit_cat6_a6xx(struct ir3_instruction *instr, void *ptr,
 		cat6->pad5 = 0x3;
 		break;
 	case OPC_STIB:
-		cat6->pad1 = 0x0;
-		cat6->pad3 = 0x6;
-		cat6->pad5 = 0x2;
-		break;
 	case OPC_LDIB:
 	case OPC_RESINFO:
-		cat6->pad1 = 0x1;
+		cat6->pad1 = 0x0;
 		cat6->pad3 = 0x6;
 		cat6->pad5 = 0x2;
 		break;