diff --git a/src/intel/compiler/brw_builder.h b/src/intel/compiler/brw_builder.h index 9df8bd2138e..50ed09380d7 100644 --- a/src/intel/compiler/brw_builder.h +++ b/src/intel/compiler/brw_builder.h @@ -435,6 +435,17 @@ public: return inst; } + /** + * Emit UNDEF for the given register if its data doesn't fully occupy + * the space we allocated. + */ + void + emit_undef_for_partial_reg(const brw_reg ®) const + { + if (brw_type_size_bytes(reg.type) * dispatch_width() < REG_SIZE) + UNDEF(reg); + } + /** * Assorted arithmetic ops. * @{ diff --git a/src/intel/compiler/brw_from_nir.cpp b/src/intel/compiler/brw_from_nir.cpp index f45a9b78de7..57e64179c77 100644 --- a/src/intel/compiler/brw_from_nir.cpp +++ b/src/intel/compiler/brw_from_nir.cpp @@ -2034,8 +2034,7 @@ get_nir_def(nir_to_brw_state &ntb, const nir_def &def, bool all_sources_uniform) ntb.ssa_values[def.index].is_scalar = is_scalar; - if (def.bit_size * bld.dispatch_width() < 8 * REG_SIZE) - bld.UNDEF(ntb.ssa_values[def.index]); + bld.emit_undef_for_partial_reg(ntb.ssa_values[def.index]); return ntb.ssa_values[def.index]; } else {