AlexIndustrial/mesa
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

aco: Spill more optimally before loops.

Browse Source 
This further reduces the dead code emitted by the spiller.
Some minimal amount of dead IR is still emitted sometimes,
but that doesn't generate any compiled code at the end.

Totals from 1953 (1.40% of 139391) affected shaders:
VGPRs: 206980 -> 206588 (-0.19%)
SpillSGPRs: 24719 -> 16423 (-33.56%); split: -33.58%, +0.02%
CodeSize: 28448516 -> 28343836 (-0.37%); split: -0.38%, +0.01%
MaxWaves: 8960 -> 8992 (+0.36%)
Instrs: 5422049 -> 5408334 (-0.25%); split: -0.26%, +0.01%
Cycles: 511240864 -> 512460764 (+0.24%); split: -0.02%, +0.26%
VMEM: 346681 -> 346468 (-0.06%); split: +0.27%, -0.33%
SMEM: 124160 -> 122802 (-1.09%); split: +0.33%, -1.42%
VClause: 81102 -> 81163 (+0.08%); split: -0.01%, +0.09%
SClause: 174404 -> 174237 (-0.10%); split: -0.23%, +0.13%
Copies: 530216 -> 532961 (+0.52%); split: -0.90%, +1.42%
Branches: 189114 -> 189221 (+0.06%); split: -0.13%, +0.18%
PreSGPRs: 206017 -> 206526 (+0.25%); split: -0.08%, +0.33%
PreVGPRs: 183103 -> 182964 (-0.08%)

Co-authored-by: Daniel Schürmann <daniel@schuermann.dev>
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8026>
This commit is contained in:
Timur Kristóf
2020-11-25 20:05:25 +01:00
committed by Marge Bot
parent b03fbec4f1
commit b75d8052a7
1 changed files with 4 additions and 3 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/amd/compiler/aco_spill.cpp
+4 -3
View File
@@ -399,12 +399,13 @@ RegisterDemand init_live_in_vars(spill_ctx& ctx, Block* block, unsigned block_id
}
}
/* select live-through vgpr variables */
/* select live-through vgpr variables and constants */
while (new_demand.vgpr - spilled_registers.vgpr > ctx.target_pressure.vgpr) {
unsigned distance = 0;
Temp to_spill;
for (std::pair<Temp, std::pair<uint32_t, uint32_t>> pair : ctx.next_use_distances_end[block_idx - 1]) {
if (pair.first.type() == RegType::vgpr &&
(pair.second.first >= loop_end || ctx.remat.count(pair.first)) &&
pair.second.first >= loop_end &&
pair.second.second > distance &&
ctx.spills_entry[block_idx].find(pair.first) == ctx.spills_entry[block_idx].end()) {
@@ -426,13 +427,13 @@ RegisterDemand init_live_in_vars(spill_ctx& ctx, Block* block, unsigned block_id
spilled_registers.vgpr += to_spill.size();
}
/* select live-through sgpr variables */
/* select live-through sgpr variables and constants */
while (new_demand.sgpr - spilled_registers.sgpr > ctx.target_pressure.sgpr) {
unsigned distance = 0;
Temp to_spill;
for (std::pair<Temp, std::pair<uint32_t, uint32_t>> pair : ctx.next_use_distances_end[block_idx - 1]) {
if (pair.first.type() == RegType::sgpr &&
pair.second.first >= loop_end &&
(pair.second.first >= loop_end || ctx.remat.count(pair.first)) &&
pair.second.second > distance &&
ctx.spills_entry[block_idx].find(pair.first) == ctx.spills_entry[block_idx].end()) {
to_spill = pair.first;