From b5f56fb47b79aeb1e81dbfc1b615173f00d47e1b Mon Sep 17 00:00:00 2001 From: Alyssa Rosenzweig Date: Mon, 30 Jun 2025 18:43:32 -0400 Subject: [PATCH] asahi: use nir_rewrite_image_intrinsic Signed-off-by: Alyssa Rosenzweig Part-of: --- .../drivers/asahi/agx_nir_lower_bindings.c | 38 +++++++------------ 1 file changed, 13 insertions(+), 25 deletions(-) diff --git a/src/gallium/drivers/asahi/agx_nir_lower_bindings.c b/src/gallium/drivers/asahi/agx_nir_lower_bindings.c index 0a7d6b3ef13..c731ef6d226 100644 --- a/src/gallium/drivers/asahi/agx_nir_lower_bindings.c +++ b/src/gallium/drivers/asahi/agx_nir_lower_bindings.c @@ -46,24 +46,18 @@ lower(nir_builder *b, nir_instr *instr, void *data) if (instr->type == nir_instr_type_intrinsic) { nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr); - nir_intrinsic_op bindless_op; - -#define CASE(op) \ - case nir_intrinsic_##op: \ - bindless_op = nir_intrinsic_bindless_##op; \ - break; switch (intr->intrinsic) { - CASE(image_load) - CASE(image_store) - CASE(image_size) - CASE(image_samples) - CASE(image_atomic) - CASE(image_atomic_swap) + case nir_intrinsic_image_load: + case nir_intrinsic_image_store: + case nir_intrinsic_image_size: + case nir_intrinsic_image_samples: + case nir_intrinsic_image_atomic: + case nir_intrinsic_image_atomic_swap: + break; default: return false; } -#undef CASE nir_def *index = intr->src[0].ssa; nir_scalar index_scalar = nir_scalar_resolved(index, 0); @@ -91,17 +85,9 @@ lower(nir_builder *b, nir_instr *instr, void *data) } } - nir_atomic_op op = nir_atomic_op_iadd /* irrelevant */; - if (nir_intrinsic_has_atomic_op(intr)) - op = nir_intrinsic_atomic_op(intr); - - /* Otherwise, lower to bindless */ - intr->intrinsic = bindless_op; - - if (nir_intrinsic_has_atomic_op(intr)) - nir_intrinsic_set_atomic_op(intr, op); - - /* The driver uploads enough null texture/PBE descriptors for robustness + /* Otherwise, lower to bindless... + * + * The driver uploads enough null texture/PBE descriptors for robustness * given the shader limit, but we still need to clamp since we're lowering * to bindless so the hardware doesn't know the limit. * @@ -113,7 +99,9 @@ lower(nir_builder *b, nir_instr *instr, void *data) nir_imm_intN_t(b, b->shader->info.num_images - 1, index->bit_size)); index = nir_iadd_imm(b, nir_imul_imm(b, index, 2), offset); - nir_src_rewrite(&intr->src[0], nir_load_texture_handle_agx(b, index)); + + nir_rewrite_image_intrinsic(intr, nir_load_texture_handle_agx(b, index), + true); } else if (instr->type == nir_instr_type_tex) { nir_tex_instr *tex = nir_instr_as_tex(instr);