diff --git a/src/intel/compiler/brw_compiler.c b/src/intel/compiler/brw_compiler.c
index 0579dbd681b..5bca239d8e6 100644
--- a/src/intel/compiler/brw_compiler.c
+++ b/src/intel/compiler/brw_compiler.c
@@ -70,7 +70,11 @@
    .avoid_ternary_with_two_constants = true,                                  \
    .has_pack_32_4x8 = true,                                                   \
    .max_unroll_iterations = 32,                                               \
-   .force_indirect_unrolling = nir_var_function_temp
+   .force_indirect_unrolling = nir_var_function_temp,                         \
+   .divergence_analysis_options =                                             \
+      (nir_divergence_single_prim_per_subgroup |                              \
+       nir_divergence_single_patch_per_tcs_subgroup |                         \
+       nir_divergence_single_patch_per_tes_subgroup)
 
 static const struct nir_shader_compiler_options scalar_nir_options = {
    COMMON_OPTIONS,
@@ -190,6 +194,12 @@ brw_compiler_create(void *mem_ctx, const struct intel_device_info *devinfo)
       nir_options->force_indirect_unrolling |=
          brw_nir_no_indirect_mask(compiler, i);
 
+      if (compiler->use_tcs_8_patch) {
+         /* TCS 8_PATCH mode has multiple patches per subgroup */
+         nir_options->divergence_analysis_options &=
+            ~nir_divergence_single_patch_per_tcs_subgroup;
+      }
+
       compiler->nir_options[i] = nir_options;
    }