diff --git a/src/amd/compiler/aco_shader_info.h b/src/amd/compiler/aco_shader_info.h index 228547ad128..80bdab175a5 100644 --- a/src/amd/compiler/aco_shader_info.h +++ b/src/amd/compiler/aco_shader_info.h @@ -115,12 +115,6 @@ struct aco_shader_info { /* Vulkan only */ uint32_t num_lds_blocks; - - /* OpenGL only */ - bool pass_tessfactors_by_reg; - unsigned patch_stride; - struct ac_arg tes_offchip_addr; - struct ac_arg vs_state_bits; } tcs; struct { uint32_t num_interp; diff --git a/src/amd/vulkan/radv_aco_shader_info.h b/src/amd/vulkan/radv_aco_shader_info.h index 8a5fdfbc405..92328b229c9 100644 --- a/src/amd/vulkan/radv_aco_shader_info.h +++ b/src/amd/vulkan/radv_aco_shader_info.h @@ -47,7 +47,6 @@ radv_aco_convert_shader_info(struct aco_shader_info *aco_info, const struct radv aco_info->epilog_pc = radv_args->epilog_pc; aco_info->hw_stage = radv_select_hw_stage(radv, gfx_level); aco_info->tcs.tcs_offchip_layout = radv_args->tcs_offchip_layout; - aco_info->tcs.pass_tessfactors_by_reg = true; aco_info->next_stage_pc = radv_args->next_stage_pc; } diff --git a/src/gallium/drivers/radeonsi/si_shader_aco.c b/src/gallium/drivers/radeonsi/si_shader_aco.c index c04aec63362..f6246e34f79 100644 --- a/src/gallium/drivers/radeonsi/si_shader_aco.c +++ b/src/gallium/drivers/radeonsi/si_shader_aco.c @@ -89,11 +89,7 @@ si_fill_aco_shader_info(struct si_shader *shader, struct aco_shader_info *info, case MESA_SHADER_TESS_CTRL: info->vs.tcs_in_out_eq = key->ge.opt.same_patch_vertices; info->vs.tcs_temp_only_input_mask = sel->info.tcs_vgpr_only_inputs; - info->tcs.pass_tessfactors_by_reg = sel->info.tessfactors_are_def_in_all_invocs; - info->tcs.patch_stride = si_get_tcs_out_patch_stride(&sel->info); info->tcs.tcs_offchip_layout = args->tcs_offchip_layout; - info->tcs.tes_offchip_addr = args->tes_offchip_addr; - info->tcs.vs_state_bits = args->vs_state_bits; break; case MESA_SHADER_FRAGMENT: info->ps.num_interp = si_get_ps_num_interp(shader);