diff --git a/src/freedreno/.gitlab-ci/reference/crash.log b/src/freedreno/.gitlab-ci/reference/crash.log
index 2f4eee79837..9a169e8450d 100644
--- a/src/freedreno/.gitlab-ci/reference/crash.log
+++ b/src/freedreno/.gitlab-ci/reference/crash.log
@@ -683,7 +683,7 @@ registers:
 	00000000	CP_SCRATCH[0x5].REG: 0
 	00000000	CP_SCRATCH[0x6].REG: 0
 	00000002	CP_SCRATCH[0x7].REG: 2
-	00000000	CP_CONTEXT_SWITCH_CNTL: 0
+	00000000	CP_CONTEXT_SWITCH_CNTL: { LEVEL = 0 }
 	00000000	CP_CONTEXT_SWITCH_SMMU_INFO: 0
 	00000000	CP_CONTEXT_SWITCH_PRIV_NON_SECURE_RESTORE_ADDR: 0
 	00000000	CP_CONTEXT_SWITCH_PRIV_SECURE_RESTORE_ADDR: 0
diff --git a/src/freedreno/.gitlab-ci/reference/crash_prefetch.log b/src/freedreno/.gitlab-ci/reference/crash_prefetch.log
index 2ac1be33712..059553ae3a3 100644
--- a/src/freedreno/.gitlab-ci/reference/crash_prefetch.log
+++ b/src/freedreno/.gitlab-ci/reference/crash_prefetch.log
@@ -898,7 +898,7 @@ registers:
 	00000000	CP_SCRATCH[0x5].REG: 0
 	00000000	CP_SCRATCH[0x6].REG: 0
 	00000001	CP_SCRATCH[0x7].REG: 1
-	00000000	CP_CONTEXT_SWITCH_CNTL: 0
+	00000000	CP_CONTEXT_SWITCH_CNTL: { LEVEL = 0 }
 	00000000	CP_CONTEXT_SWITCH_SMMU_INFO: 0
 	00000000	CP_CONTEXT_SWITCH_PRIV_NON_SECURE_RESTORE_ADDR: 0
 	00000000	CP_CONTEXT_SWITCH_PRIV_SECURE_RESTORE_ADDR: 0
diff --git a/src/freedreno/.gitlab-ci/reference/prefetch-test.log b/src/freedreno/.gitlab-ci/reference/prefetch-test.log
index a4770c144b7..999564068da 100644
--- a/src/freedreno/.gitlab-ci/reference/prefetch-test.log
+++ b/src/freedreno/.gitlab-ci/reference/prefetch-test.log
@@ -1477,7 +1477,7 @@ registers:
 	00000000	CP_SCRATCH[0x5].REG: 0
 	00000000	CP_SCRATCH[0x6].REG: 0
 	00000002	CP_SCRATCH[0x7].REG: 2
-	00000000	CP_CONTEXT_SWITCH_CNTL: 0
+	00000000	CP_CONTEXT_SWITCH_CNTL: { LEVEL = 0 }
 	00000000	CP_CONTEXT_SWITCH_SMMU_INFO: 0
 	00000000	CP_CONTEXT_SWITCH_PRIV_NON_SECURE_RESTORE_ADDR: 0
 	00000000	CP_CONTEXT_SWITCH_PRIV_SECURE_RESTORE_ADDR: 0
diff --git a/src/freedreno/registers/adreno/a6xx.xml b/src/freedreno/registers/adreno/a6xx.xml
index 491d3c97f67..03100e020a3 100644
--- a/src/freedreno/registers/adreno/a6xx.xml
+++ b/src/freedreno/registers/adreno/a6xx.xml
@@ -2358,7 +2358,12 @@ to upconvert to 32b float internally?
 		<reg32 offset="0x0" name="REG" type="a6x_cp_protect"/>
 	</array>
 
-	<reg32 offset="0x08A0" name="CP_CONTEXT_SWITCH_CNTL"/>
+	<reg32 offset="0x08A0" name="CP_CONTEXT_SWITCH_CNTL">
+		<bitfield name="STOP" pos="0" type="boolean"/>
+		<bitfield name="LEVEL" low="6" high="7"/>
+		<bitfield name="USES_GMEM" pos="8" type="boolean"/>
+		<bitfield name="SKIP_SAVE_RESTORE" pos="9" type="boolean"/>
+	</reg32>
 	<reg64 offset="0x08A1" name="CP_CONTEXT_SWITCH_SMMU_INFO"/>
 	<reg64 offset="0x08A3" name="CP_CONTEXT_SWITCH_PRIV_NON_SECURE_RESTORE_ADDR"/>
 	<reg64 offset="0x08A5" name="CP_CONTEXT_SWITCH_PRIV_SECURE_RESTORE_ADDR"/>