diff --git a/src/gallium/drivers/r600/radeon_vce.c b/src/gallium/drivers/r600/radeon_vce.c
index 866dcfed466..67c52eeaa88 100644
--- a/src/gallium/drivers/r600/radeon_vce.c
+++ b/src/gallium/drivers/r600/radeon_vce.c
@@ -105,7 +105,7 @@ static void reset_cpb(struct rvce_encoder *enc)
 	for (i = 0; i < enc->cpb_num; ++i) {
 		struct rvce_cpb_slot *slot = &enc->cpb_array[i];
 		slot->index = i;
-		slot->picture_type = PIPE_H264_ENC_PICTURE_TYPE_SKIP;
+		slot->picture_type = PIPE_H2645_ENC_PICTURE_TYPE_SKIP;
 		slot->frame_num = 0;
 		slot->pic_order_cnt = 0;
 		list_addtail(&slot->list, &enc->cpb_slots);
@@ -126,10 +126,10 @@ static void sort_cpb(struct rvce_encoder *enc)
 		if (i->frame_num == enc->pic.ref_idx_l1)
 			l1 = i;
 
-		if (enc->pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_P && l0)
+		if (enc->pic.picture_type == PIPE_H2645_ENC_PICTURE_TYPE_P && l0)
 			break;
 
-		if (enc->pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_B &&
+		if (enc->pic.picture_type == PIPE_H2645_ENC_PICTURE_TYPE_B &&
 		    l0 && l1)
 			break;
 	}
@@ -281,10 +281,10 @@ static void rvce_begin_frame(struct pipe_video_codec *encoder,
 	enc->get_buffer(vid_buf->resources[0], &enc->handle, &enc->luma);
 	enc->get_buffer(vid_buf->resources[1], NULL, &enc->chroma);
 
-	if (pic->picture_type == PIPE_H264_ENC_PICTURE_TYPE_IDR)
+	if (pic->picture_type == PIPE_H2645_ENC_PICTURE_TYPE_IDR)
 		reset_cpb(enc);
-	else if (pic->picture_type == PIPE_H264_ENC_PICTURE_TYPE_P ||
-	         pic->picture_type == PIPE_H264_ENC_PICTURE_TYPE_B)
+	else if (pic->picture_type == PIPE_H2645_ENC_PICTURE_TYPE_P ||
+	         pic->picture_type == PIPE_H2645_ENC_PICTURE_TYPE_B)
 		sort_cpb(enc);
 	
 	if (!enc->stream_handle) {
diff --git a/src/gallium/drivers/r600/radeon_vce.h b/src/gallium/drivers/r600/radeon_vce.h
index 3faea7ad2f5..a437336bcce 100644
--- a/src/gallium/drivers/r600/radeon_vce.h
+++ b/src/gallium/drivers/r600/radeon_vce.h
@@ -60,7 +60,7 @@ struct rvce_cpb_slot {
 	struct list_head		list;
 
 	unsigned			index;
-	enum pipe_h264_enc_picture_type	picture_type;
+	enum pipe_h2645_enc_picture_type	picture_type;
 	unsigned			frame_num;
 	unsigned			pic_order_cnt;
 };
@@ -340,7 +340,7 @@ struct rvce_h264_enc_pic {
 	unsigned quant_p_frames;
 	unsigned quant_b_frames;
 
-	enum pipe_h264_enc_picture_type picture_type;
+	enum pipe_h2645_enc_picture_type picture_type;
 	unsigned frame_num;
 	unsigned frame_num_cnt;
 	unsigned p_remain;
diff --git a/src/gallium/drivers/radeon/radeon_uvd_enc.c b/src/gallium/drivers/radeon/radeon_uvd_enc.c
index 8298298879f..d4223b39955 100644
--- a/src/gallium/drivers/radeon/radeon_uvd_enc.c
+++ b/src/gallium/drivers/radeon/radeon_uvd_enc.c
@@ -58,8 +58,8 @@ static void radeon_uvd_enc_get_param(struct radeon_uvd_encoder *enc,
    enc->enc_pic.pic_order_cnt = pic->pic_order_cnt;
    enc->enc_pic.pic_order_cnt_type = pic->pic_order_cnt_type;
    enc->enc_pic.not_referenced = pic->not_referenced;
-   enc->enc_pic.is_iframe = (pic->picture_type == PIPE_H265_ENC_PICTURE_TYPE_IDR) ||
-                            (pic->picture_type == PIPE_H265_ENC_PICTURE_TYPE_I);
+   enc->enc_pic.is_iframe = (pic->picture_type == PIPE_H2645_ENC_PICTURE_TYPE_IDR) ||
+                            (pic->picture_type == PIPE_H2645_ENC_PICTURE_TYPE_I);
 
    if (pic->seq.conformance_window_flag) {
          enc->enc_pic.crop_left = pic->seq.conf_win_left_offset;
diff --git a/src/gallium/drivers/radeon/radeon_uvd_enc.h b/src/gallium/drivers/radeon/radeon_uvd_enc.h
index 89dc60a50b7..3eaf10b33ad 100644
--- a/src/gallium/drivers/radeon/radeon_uvd_enc.h
+++ b/src/gallium/drivers/radeon/radeon_uvd_enc.h
@@ -331,7 +331,7 @@ struct pipe_video_codec *radeon_uvd_create_encoder(struct pipe_context *context,
                                                    radeon_uvd_enc_get_buffer get_buffer);
 
 struct radeon_uvd_enc_pic {
-   enum pipe_h265_enc_picture_type picture_type;
+   enum pipe_h2645_enc_picture_type picture_type;
 
    unsigned frame_num;
    unsigned pic_order_cnt;
diff --git a/src/gallium/drivers/radeon/radeon_uvd_enc_1_1.c b/src/gallium/drivers/radeon/radeon_uvd_enc_1_1.c
index 9b0f9872f61..e90fecd595f 100644
--- a/src/gallium/drivers/radeon/radeon_uvd_enc_1_1.c
+++ b/src/gallium/drivers/radeon/radeon_uvd_enc_1_1.c
@@ -304,15 +304,15 @@ static void radeon_uvd_enc_rc_session_init(struct radeon_uvd_encoder *enc,
    struct pipe_h265_enc_picture_desc *pic = (struct pipe_h265_enc_picture_desc *)picture;
    enc->enc_pic.rc_session_init.vbv_buffer_level = pic->rc.vbv_buf_lv;
    switch (pic->rc.rate_ctrl_method) {
-   case PIPE_H265_ENC_RATE_CONTROL_METHOD_DISABLE:
+   case PIPE_H2645_ENC_RATE_CONTROL_METHOD_DISABLE:
       enc->enc_pic.rc_session_init.rate_control_method = RENC_UVD_RATE_CONTROL_METHOD_NONE;
       break;
-   case PIPE_H265_ENC_RATE_CONTROL_METHOD_CONSTANT_SKIP:
-   case PIPE_H265_ENC_RATE_CONTROL_METHOD_CONSTANT:
+   case PIPE_H2645_ENC_RATE_CONTROL_METHOD_CONSTANT_SKIP:
+   case PIPE_H2645_ENC_RATE_CONTROL_METHOD_CONSTANT:
       enc->enc_pic.rc_session_init.rate_control_method = RENC_UVD_RATE_CONTROL_METHOD_CBR;
       break;
-   case PIPE_H265_ENC_RATE_CONTROL_METHOD_VARIABLE_SKIP:
-   case PIPE_H265_ENC_RATE_CONTROL_METHOD_VARIABLE:
+   case PIPE_H2645_ENC_RATE_CONTROL_METHOD_VARIABLE_SKIP:
+   case PIPE_H2645_ENC_RATE_CONTROL_METHOD_VARIABLE:
       enc->enc_pic.rc_session_init.rate_control_method =
          RENC_UVD_RATE_CONTROL_METHOD_PEAK_CONSTRAINED_VBR;
       break;
@@ -611,14 +611,14 @@ static void radeon_uvd_enc_nalu_aud_hevc(struct radeon_uvd_encoder *enc)
    radeon_uvd_enc_byte_align(enc);
    radeon_uvd_enc_set_emulation_prevention(enc, true);
    switch (enc->enc_pic.picture_type) {
-   case PIPE_H265_ENC_PICTURE_TYPE_I:
-   case PIPE_H265_ENC_PICTURE_TYPE_IDR:
+   case PIPE_H2645_ENC_PICTURE_TYPE_I:
+   case PIPE_H2645_ENC_PICTURE_TYPE_IDR:
       radeon_uvd_enc_code_fixed_bits(enc, 0x00, 3);
       break;
-   case PIPE_H265_ENC_PICTURE_TYPE_P:
+   case PIPE_H2645_ENC_PICTURE_TYPE_P:
       radeon_uvd_enc_code_fixed_bits(enc, 0x01, 3);
       break;
-   case PIPE_H265_ENC_PICTURE_TYPE_B:
+   case PIPE_H2645_ENC_PICTURE_TYPE_B:
       radeon_uvd_enc_code_fixed_bits(enc, 0x02, 3);
       break;
    default:
@@ -678,15 +678,15 @@ static void radeon_uvd_enc_slice_header_hevc(struct radeon_uvd_encoder *enc)
    inst_index++;
 
    switch (enc->enc_pic.picture_type) {
-   case PIPE_H265_ENC_PICTURE_TYPE_I:
-   case PIPE_H265_ENC_PICTURE_TYPE_IDR:
+   case PIPE_H2645_ENC_PICTURE_TYPE_I:
+   case PIPE_H2645_ENC_PICTURE_TYPE_IDR:
       radeon_uvd_enc_code_ue(enc, 0x2);
       break;
-   case PIPE_H265_ENC_PICTURE_TYPE_P:
-   case PIPE_H265_ENC_PICTURE_TYPE_SKIP:
+   case PIPE_H2645_ENC_PICTURE_TYPE_P:
+   case PIPE_H2645_ENC_PICTURE_TYPE_SKIP:
       radeon_uvd_enc_code_ue(enc, 0x1);
       break;
-   case PIPE_H265_ENC_PICTURE_TYPE_B:
+   case PIPE_H2645_ENC_PICTURE_TYPE_B:
       radeon_uvd_enc_code_ue(enc, 0x0);
       break;
    default:
@@ -695,7 +695,7 @@ static void radeon_uvd_enc_slice_header_hevc(struct radeon_uvd_encoder *enc)
 
    if ((enc->enc_pic.nal_unit_type != 19) && (enc->enc_pic.nal_unit_type != 20)) {
       radeon_uvd_enc_code_fixed_bits(enc, enc->enc_pic.pic_order_cnt, enc->enc_pic.log2_max_poc);
-      if (enc->enc_pic.picture_type == PIPE_H265_ENC_PICTURE_TYPE_P)
+      if (enc->enc_pic.picture_type == PIPE_H2645_ENC_PICTURE_TYPE_P)
          radeon_uvd_enc_code_fixed_bits(enc, 0x1, 1);
       else {
          radeon_uvd_enc_code_fixed_bits(enc, 0x0, 1);
@@ -708,8 +708,8 @@ static void radeon_uvd_enc_slice_header_hevc(struct radeon_uvd_encoder *enc)
    if (enc->enc_pic.sample_adaptive_offset_enabled_flag)
       radeon_uvd_enc_code_fixed_bits(enc, 0x0, 1); /* slice_sao_luma_flag */
 
-   if ((enc->enc_pic.picture_type == PIPE_H265_ENC_PICTURE_TYPE_P) ||
-       (enc->enc_pic.picture_type == PIPE_H265_ENC_PICTURE_TYPE_B)) {
+   if ((enc->enc_pic.picture_type == PIPE_H2645_ENC_PICTURE_TYPE_P) ||
+       (enc->enc_pic.picture_type == PIPE_H2645_ENC_PICTURE_TYPE_B)) {
       radeon_uvd_enc_code_fixed_bits(enc, 0x0, 1);
       radeon_uvd_enc_code_fixed_bits(enc, enc->enc_pic.hevc_spec_misc.cabac_init_flag, 1);
       radeon_uvd_enc_code_ue(enc, 5 - enc->enc_pic.max_num_merge_cand);
@@ -856,17 +856,17 @@ static void radeon_uvd_enc_encode_params_hevc(struct radeon_uvd_encoder *enc)
 {
    struct si_screen *sscreen = (struct si_screen *)enc->screen;
    switch (enc->enc_pic.picture_type) {
-   case PIPE_H265_ENC_PICTURE_TYPE_I:
-   case PIPE_H265_ENC_PICTURE_TYPE_IDR:
+   case PIPE_H2645_ENC_PICTURE_TYPE_I:
+   case PIPE_H2645_ENC_PICTURE_TYPE_IDR:
       enc->enc_pic.enc_params.pic_type = RENC_UVD_PICTURE_TYPE_I;
       break;
-   case PIPE_H265_ENC_PICTURE_TYPE_P:
+   case PIPE_H2645_ENC_PICTURE_TYPE_P:
       enc->enc_pic.enc_params.pic_type = RENC_UVD_PICTURE_TYPE_P;
       break;
-   case PIPE_H265_ENC_PICTURE_TYPE_SKIP:
+   case PIPE_H2645_ENC_PICTURE_TYPE_SKIP:
       enc->enc_pic.enc_params.pic_type = RENC_UVD_PICTURE_TYPE_P_SKIP;
       break;
-   case PIPE_H265_ENC_PICTURE_TYPE_B:
+   case PIPE_H2645_ENC_PICTURE_TYPE_B:
       enc->enc_pic.enc_params.pic_type = RENC_UVD_PICTURE_TYPE_B;
       break;
    default:
diff --git a/src/gallium/drivers/radeon/radeon_vce.c b/src/gallium/drivers/radeon/radeon_vce.c
index 1f23ebf064d..85be898d223 100644
--- a/src/gallium/drivers/radeon/radeon_vce.c
+++ b/src/gallium/drivers/radeon/radeon_vce.c
@@ -93,7 +93,7 @@ static void reset_cpb(struct rvce_encoder *enc)
    for (i = 0; i < enc->cpb_num; ++i) {
       struct rvce_cpb_slot *slot = &enc->cpb_array[i];
       slot->index = i;
-      slot->picture_type = PIPE_H264_ENC_PICTURE_TYPE_SKIP;
+      slot->picture_type = PIPE_H2645_ENC_PICTURE_TYPE_SKIP;
       slot->frame_num = 0;
       slot->pic_order_cnt = 0;
       list_addtail(&slot->list, &enc->cpb_slots);
@@ -114,10 +114,10 @@ static void sort_cpb(struct rvce_encoder *enc)
       if (i->frame_num == enc->pic.ref_idx_l1)
          l1 = i;
 
-      if (enc->pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_P && l0)
+      if (enc->pic.picture_type == PIPE_H2645_ENC_PICTURE_TYPE_P && l0)
          break;
 
-      if (enc->pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_B && l0 && l1)
+      if (enc->pic.picture_type == PIPE_H2645_ENC_PICTURE_TYPE_B && l0 && l1)
          break;
    }
 
@@ -275,10 +275,10 @@ static void rvce_begin_frame(struct pipe_video_codec *encoder, struct pipe_video
    enc->get_buffer(vid_buf->resources[0], &enc->handle, &enc->luma);
    enc->get_buffer(vid_buf->resources[1], NULL, &enc->chroma);
 
-   if (pic->picture_type == PIPE_H264_ENC_PICTURE_TYPE_IDR)
+   if (pic->picture_type == PIPE_H2645_ENC_PICTURE_TYPE_IDR)
       reset_cpb(enc);
-   else if (pic->picture_type == PIPE_H264_ENC_PICTURE_TYPE_P ||
-            pic->picture_type == PIPE_H264_ENC_PICTURE_TYPE_B)
+   else if (pic->picture_type == PIPE_H2645_ENC_PICTURE_TYPE_P ||
+            pic->picture_type == PIPE_H2645_ENC_PICTURE_TYPE_B)
       sort_cpb(enc);
 
    if (!enc->stream_handle) {
diff --git a/src/gallium/drivers/radeon/radeon_vce.h b/src/gallium/drivers/radeon/radeon_vce.h
index 007d6029a31..35a7514cccb 100644
--- a/src/gallium/drivers/radeon/radeon_vce.h
+++ b/src/gallium/drivers/radeon/radeon_vce.h
@@ -60,7 +60,7 @@ struct rvce_cpb_slot {
    struct list_head list;
 
    unsigned index;
-   enum pipe_h264_enc_picture_type picture_type;
+   enum pipe_h2645_enc_picture_type picture_type;
    unsigned frame_num;
    unsigned pic_order_cnt;
 };
@@ -342,7 +342,7 @@ struct rvce_h264_enc_pic {
    unsigned quant_p_frames;
    unsigned quant_b_frames;
 
-   enum pipe_h264_enc_picture_type picture_type;
+   enum pipe_h2645_enc_picture_type picture_type;
    unsigned frame_num;
    unsigned frame_num_cnt;
    unsigned p_remain;
diff --git a/src/gallium/drivers/radeon/radeon_vce_40_2_2.c b/src/gallium/drivers/radeon/radeon_vce_40_2_2.c
index bcd96093af9..ee7cf15e1e6 100644
--- a/src/gallium/drivers/radeon/radeon_vce_40_2_2.c
+++ b/src/gallium/drivers/radeon/radeon_vce_40_2_2.c
@@ -317,7 +317,7 @@ static void encode(struct rvce_encoder *enc)
    RVCE_CS(0x00000000);                                               // encInputPic(Addr|Array)Mode
    RVCE_CS(0x00000000);                                               // encInputPicTileConfig
    RVCE_CS(enc->pic.picture_type);                                    // encPicType
-   RVCE_CS(enc->pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_IDR);  // encIdrFlag
+   RVCE_CS(enc->pic.picture_type == PIPE_H2645_ENC_PICTURE_TYPE_IDR); // encIdrFlag
    RVCE_CS(0x00000000);                                               // encIdrPicId
    RVCE_CS(0x00000000);                                               // encMGSKeyPic
    RVCE_CS(!enc->pic.not_referenced);                                 // encReferenceFlag
@@ -327,7 +327,7 @@ static void encode(struct rvce_encoder *enc)
    RVCE_CS(0x00000000); // num_ref_idx_l1_active_minus1
 
    i = enc->pic.frame_num - enc->pic.ref_idx_l0;
-   if (i > 1 && enc->pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_P) {
+   if (i > 1 && enc->pic.picture_type == PIPE_H2645_ENC_PICTURE_TYPE_P) {
       RVCE_CS(0x00000001); // encRefListModificationOp
       RVCE_CS(i - 1);      // encRefListModificationNum
    } else {
@@ -349,8 +349,8 @@ static void encode(struct rvce_encoder *enc)
 
    // encReferencePictureL0[0]
    RVCE_CS(0x00000000); // pictureStructure
-   if (enc->pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_P ||
-       enc->pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_B) {
+   if (enc->pic.picture_type == PIPE_H2645_ENC_PICTURE_TYPE_P ||
+       enc->pic.picture_type == PIPE_H2645_ENC_PICTURE_TYPE_B) {
       struct rvce_cpb_slot *l0 = si_l0_slot(enc);
       si_vce_frame_offset(enc, l0, &luma_offset, &chroma_offset);
       RVCE_CS(l0->picture_type);  // encPicType
@@ -376,7 +376,7 @@ static void encode(struct rvce_encoder *enc)
 
    // encReferencePictureL1[0]
    RVCE_CS(0x00000000); // pictureStructure
-   if (enc->pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_B) {
+   if (enc->pic.picture_type == PIPE_H2645_ENC_PICTURE_TYPE_B) {
       struct rvce_cpb_slot *l1 = si_l1_slot(enc);
       si_vce_frame_offset(enc, l1, &luma_offset, &chroma_offset);
       RVCE_CS(l1->picture_type);  // encPicType
diff --git a/src/gallium/drivers/radeon/radeon_vce_50.c b/src/gallium/drivers/radeon/radeon_vce_50.c
index 9f972eef600..591207c6f96 100644
--- a/src/gallium/drivers/radeon/radeon_vce_50.c
+++ b/src/gallium/drivers/radeon/radeon_vce_50.c
@@ -76,7 +76,7 @@ static void encode(struct rvce_encoder *enc)
    if (enc->dual_inst) {
       if (bs_idx == 0)
          dep = 1;
-      else if (enc->pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_IDR)
+      else if (enc->pic.picture_type == PIPE_H2645_ENC_PICTURE_TYPE_IDR)
          dep = 0;
       else
          dep = 2;
@@ -130,7 +130,7 @@ static void encode(struct rvce_encoder *enc)
       RVCE_CS(0x00010000); // encInputPic(Addr|Array)Mode,encDisable(TwoPipeMode|MBOffloading)
    RVCE_CS(0x00000000);    // encInputPicTileConfig
    RVCE_CS(enc->pic.picture_type);                                   // encPicType
-   RVCE_CS(enc->pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_IDR); // encIdrFlag
+   RVCE_CS(enc->pic.picture_type == PIPE_H2645_ENC_PICTURE_TYPE_IDR);// encIdrFlag
    RVCE_CS(0x00000000);                                              // encIdrPicId
    RVCE_CS(0x00000000);                                              // encMGSKeyPic
    RVCE_CS(!enc->pic.not_referenced);                                // encReferenceFlag
@@ -140,7 +140,7 @@ static void encode(struct rvce_encoder *enc)
    RVCE_CS(0x00000000); // num_ref_idx_l1_active_minus1
 
    i = enc->pic.frame_num - enc->pic.ref_idx_l0;
-   if (i > 1 && enc->pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_P) {
+   if (i > 1 && enc->pic.picture_type == PIPE_H2645_ENC_PICTURE_TYPE_P) {
       RVCE_CS(0x00000001); // encRefListModificationOp
       RVCE_CS(i - 1);      // encRefListModificationNum
    } else {
@@ -162,8 +162,8 @@ static void encode(struct rvce_encoder *enc)
 
    // encReferencePictureL0[0]
    RVCE_CS(0x00000000); // pictureStructure
-   if (enc->pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_P ||
-       enc->pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_B) {
+   if (enc->pic.picture_type == PIPE_H2645_ENC_PICTURE_TYPE_P ||
+       enc->pic.picture_type == PIPE_H2645_ENC_PICTURE_TYPE_B) {
       struct rvce_cpb_slot *l0 = si_l0_slot(enc);
       si_vce_frame_offset(enc, l0, &luma_offset, &chroma_offset);
       RVCE_CS(l0->picture_type);  // encPicType
@@ -189,7 +189,7 @@ static void encode(struct rvce_encoder *enc)
 
    // encReferencePictureL1[0]
    RVCE_CS(0x00000000); // pictureStructure
-   if (enc->pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_B) {
+   if (enc->pic.picture_type == PIPE_H2645_ENC_PICTURE_TYPE_B) {
       struct rvce_cpb_slot *l1 = si_l1_slot(enc);
       si_vce_frame_offset(enc, l1, &luma_offset, &chroma_offset);
       RVCE_CS(l1->picture_type);  // encPicType
diff --git a/src/gallium/drivers/radeon/radeon_vce_52.c b/src/gallium/drivers/radeon/radeon_vce_52.c
index e4a50053f06..2ad7d8343d3 100644
--- a/src/gallium/drivers/radeon/radeon_vce_52.c
+++ b/src/gallium/drivers/radeon/radeon_vce_52.c
@@ -52,7 +52,7 @@ static void get_rate_control_param(struct rvce_encoder *enc, struct pipe_h264_en
     * target bitrate (e.g. no over +/-10%), vbv_buffer_size should be same
     * as target bitrate.
     */
-   if (enc->enc_pic.rc.rc_method == PIPE_H264_ENC_RATE_CONTROL_METHOD_CONSTANT) {
+   if (enc->enc_pic.rc.rc_method == PIPE_H2645_ENC_RATE_CONTROL_METHOD_CONSTANT) {
            enc->enc_pic.rc.vbv_buffer_size = pic->rate_ctrl.target_bitrate;
    } else {
            enc->enc_pic.rc.vbv_buffer_size = pic->rate_ctrl.vbv_buffer_size;
@@ -176,7 +176,7 @@ void si_vce_52_get_param(struct rvce_encoder *enc, struct pipe_h264_enc_picture_
       enc->enc_pic.addrmode_arraymode_disrdo_distwoinstants = 0x00000201;
    else
       enc->enc_pic.addrmode_arraymode_disrdo_distwoinstants = 0x01000201;
-   enc->enc_pic.is_idr = (pic->picture_type == PIPE_H264_ENC_PICTURE_TYPE_IDR);
+   enc->enc_pic.is_idr = (pic->picture_type == PIPE_H2645_ENC_PICTURE_TYPE_IDR);
 }
 
 static void create(struct rvce_encoder *enc)
@@ -221,7 +221,7 @@ static void encode(struct rvce_encoder *enc)
    if (enc->dual_inst) {
       if (bs_idx == 0)
          dep = 1;
-      else if (enc->enc_pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_IDR)
+      else if (enc->enc_pic.picture_type == PIPE_H2645_ENC_PICTURE_TYPE_IDR)
          dep = 0;
       else
          dep = 2;
@@ -287,9 +287,9 @@ static void encode(struct rvce_encoder *enc)
       enc->enc_pic.eo.enc_input_pic_addr_array_disable2pipe_disablemboffload = 0x00010000;
    RVCE_CS(enc->enc_pic.eo.enc_input_pic_addr_array_disable2pipe_disablemboffload);
    RVCE_CS(enc->enc_pic.eo.enc_input_pic_tile_config);
-   RVCE_CS(enc->enc_pic.picture_type);                                   // encPicType
-   RVCE_CS(enc->enc_pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_IDR); // encIdrFlag
-   if ((enc->enc_pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_IDR) &&
+   RVCE_CS(enc->enc_pic.picture_type);                                    // encPicType
+   RVCE_CS(enc->enc_pic.picture_type == PIPE_H2645_ENC_PICTURE_TYPE_IDR); // encIdrFlag
+   if ((enc->enc_pic.picture_type == PIPE_H2645_ENC_PICTURE_TYPE_IDR) &&
        (enc->enc_pic.eo.enc_idr_pic_id != 0))
       enc->enc_pic.eo.enc_idr_pic_id = enc->enc_pic.idr_pic_id - 1;
    else
@@ -303,7 +303,7 @@ static void encode(struct rvce_encoder *enc)
    RVCE_CS(enc->enc_pic.eo.num_ref_idx_l1_active_minus1);
 
    i = enc->enc_pic.frame_num - enc->enc_pic.ref_idx_l0;
-   if (i > 1 && enc->enc_pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_P) {
+   if (i > 1 && enc->enc_pic.picture_type == PIPE_H2645_ENC_PICTURE_TYPE_P) {
       enc->enc_pic.eo.enc_ref_list_modification_op = 0x00000001;
       enc->enc_pic.eo.enc_ref_list_modification_num = i - 1;
       RVCE_CS(enc->enc_pic.eo.enc_ref_list_modification_op);
@@ -331,8 +331,8 @@ static void encode(struct rvce_encoder *enc)
 
    // encReferencePictureL0[0]
    RVCE_CS(0x00000000); // pictureStructure
-   if (enc->enc_pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_P ||
-       enc->enc_pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_B) {
+   if (enc->enc_pic.picture_type == PIPE_H2645_ENC_PICTURE_TYPE_P ||
+       enc->enc_pic.picture_type == PIPE_H2645_ENC_PICTURE_TYPE_B) {
       struct rvce_cpb_slot *l0 = si_l0_slot(enc);
       si_vce_frame_offset(enc, l0, &luma_offset, &chroma_offset);
       RVCE_CS(l0->picture_type);
@@ -369,7 +369,7 @@ static void encode(struct rvce_encoder *enc)
 
    // encReferencePictureL1[0]
    RVCE_CS(0x00000000); // pictureStructure
-   if (enc->enc_pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_B) {
+   if (enc->enc_pic.picture_type == PIPE_H2645_ENC_PICTURE_TYPE_B) {
       struct rvce_cpb_slot *l1 = si_l1_slot(enc);
       si_vce_frame_offset(enc, l1, &luma_offset, &chroma_offset);
       RVCE_CS(l1->picture_type);
diff --git a/src/gallium/drivers/radeon/radeon_vcn_enc.c b/src/gallium/drivers/radeon/radeon_vcn_enc.c
index 305f02ee39a..0e7f68a20c9 100644
--- a/src/gallium/drivers/radeon/radeon_vcn_enc.c
+++ b/src/gallium/drivers/radeon/radeon_vcn_enc.c
@@ -49,7 +49,7 @@ static void radeon_vcn_enc_get_param(struct radeon_encoder *enc, struct pipe_pic
       enc->enc_pic.ref_idx_l0 = pic->ref_idx_l0;
       enc->enc_pic.ref_idx_l1 = pic->ref_idx_l1;
       enc->enc_pic.not_referenced = pic->not_referenced;
-      enc->enc_pic.is_idr = (pic->picture_type == PIPE_H264_ENC_PICTURE_TYPE_IDR);
+      enc->enc_pic.is_idr = (pic->picture_type == PIPE_H2645_ENC_PICTURE_TYPE_IDR);
       if (pic->pic_ctrl.enc_frame_cropping_flag) {
          enc->enc_pic.crop_left = pic->pic_ctrl.enc_frame_crop_left_offset;
          enc->enc_pic.crop_right = pic->pic_ctrl.enc_frame_crop_right_offset;
@@ -80,15 +80,15 @@ static void radeon_vcn_enc_get_param(struct radeon_encoder *enc, struct pipe_pic
       enc->enc_pic.rc_per_pic.skip_frame_enable = false;
       enc->enc_pic.rc_per_pic.enforce_hrd = pic->rate_ctrl.enforce_hrd;
       switch (pic->rate_ctrl.rate_ctrl_method) {
-      case PIPE_H264_ENC_RATE_CONTROL_METHOD_DISABLE:
+      case PIPE_H2645_ENC_RATE_CONTROL_METHOD_DISABLE:
          enc->enc_pic.rc_session_init.rate_control_method = RENCODE_RATE_CONTROL_METHOD_NONE;
          break;
-      case PIPE_H264_ENC_RATE_CONTROL_METHOD_CONSTANT_SKIP:
-      case PIPE_H264_ENC_RATE_CONTROL_METHOD_CONSTANT:
+      case PIPE_H2645_ENC_RATE_CONTROL_METHOD_CONSTANT_SKIP:
+      case PIPE_H2645_ENC_RATE_CONTROL_METHOD_CONSTANT:
          enc->enc_pic.rc_session_init.rate_control_method = RENCODE_RATE_CONTROL_METHOD_CBR;
          break;
-      case PIPE_H264_ENC_RATE_CONTROL_METHOD_VARIABLE_SKIP:
-      case PIPE_H264_ENC_RATE_CONTROL_METHOD_VARIABLE:
+      case PIPE_H2645_ENC_RATE_CONTROL_METHOD_VARIABLE_SKIP:
+      case PIPE_H2645_ENC_RATE_CONTROL_METHOD_VARIABLE:
          enc->enc_pic.rc_session_init.rate_control_method =
             RENCODE_RATE_CONTROL_METHOD_PEAK_CONSTRAINED_VBR;
          break;
@@ -104,8 +104,8 @@ static void radeon_vcn_enc_get_param(struct radeon_encoder *enc, struct pipe_pic
       enc->enc_pic.ref_idx_l0 = pic->ref_idx_l0;
       enc->enc_pic.ref_idx_l1 = pic->ref_idx_l1;
       enc->enc_pic.not_referenced = pic->not_referenced;
-      enc->enc_pic.is_idr = (pic->picture_type == PIPE_H265_ENC_PICTURE_TYPE_IDR) ||
-                            (pic->picture_type == PIPE_H265_ENC_PICTURE_TYPE_I);
+      enc->enc_pic.is_idr = (pic->picture_type == PIPE_H2645_ENC_PICTURE_TYPE_IDR) ||
+                            (pic->picture_type == PIPE_H2645_ENC_PICTURE_TYPE_I);
 
       if (pic->seq.conformance_window_flag) {
           enc->enc_pic.crop_left = pic->seq.conf_win_left_offset;
@@ -184,15 +184,15 @@ static void radeon_vcn_enc_get_param(struct radeon_encoder *enc, struct pipe_pic
       enc->enc_pic.rc_per_pic.skip_frame_enable = false;
       enc->enc_pic.rc_per_pic.enforce_hrd = pic->rc.enforce_hrd;
       switch (pic->rc.rate_ctrl_method) {
-      case PIPE_H265_ENC_RATE_CONTROL_METHOD_DISABLE:
+      case PIPE_H2645_ENC_RATE_CONTROL_METHOD_DISABLE:
          enc->enc_pic.rc_session_init.rate_control_method = RENCODE_RATE_CONTROL_METHOD_NONE;
          break;
-      case PIPE_H265_ENC_RATE_CONTROL_METHOD_CONSTANT_SKIP:
-      case PIPE_H265_ENC_RATE_CONTROL_METHOD_CONSTANT:
+      case PIPE_H2645_ENC_RATE_CONTROL_METHOD_CONSTANT_SKIP:
+      case PIPE_H2645_ENC_RATE_CONTROL_METHOD_CONSTANT:
          enc->enc_pic.rc_session_init.rate_control_method = RENCODE_RATE_CONTROL_METHOD_CBR;
          break;
-      case PIPE_H265_ENC_RATE_CONTROL_METHOD_VARIABLE_SKIP:
-      case PIPE_H265_ENC_RATE_CONTROL_METHOD_VARIABLE:
+      case PIPE_H2645_ENC_RATE_CONTROL_METHOD_VARIABLE_SKIP:
+      case PIPE_H2645_ENC_RATE_CONTROL_METHOD_VARIABLE:
          enc->enc_pic.rc_session_init.rate_control_method =
             RENCODE_RATE_CONTROL_METHOD_PEAK_CONSTRAINED_VBR;
          break;
diff --git a/src/gallium/drivers/radeon/radeon_vcn_enc.h b/src/gallium/drivers/radeon/radeon_vcn_enc.h
index 8b798c536c6..a11682fb3bd 100644
--- a/src/gallium/drivers/radeon/radeon_vcn_enc.h
+++ b/src/gallium/drivers/radeon/radeon_vcn_enc.h
@@ -409,7 +409,7 @@ struct pipe_video_codec *radeon_create_encoder(struct pipe_context *context,
                                                radeon_enc_get_buffer get_buffer);
 
 struct radeon_enc_pic {
-   enum pipe_h264_enc_picture_type picture_type;
+   enum pipe_h2645_enc_picture_type picture_type;
 
    unsigned frame_num;
    unsigned pic_order_cnt;
diff --git a/src/gallium/drivers/radeon/radeon_vcn_enc_1_2.c b/src/gallium/drivers/radeon/radeon_vcn_enc_1_2.c
index e24e60e2609..6e85eb33ff9 100644
--- a/src/gallium/drivers/radeon/radeon_vcn_enc_1_2.c
+++ b/src/gallium/drivers/radeon/radeon_vcn_enc_1_2.c
@@ -613,14 +613,14 @@ static void radeon_enc_nalu_aud_hevc(struct radeon_encoder *enc)
    radeon_enc_byte_align(enc);
    radeon_enc_set_emulation_prevention(enc, true);
    switch (enc->enc_pic.picture_type) {
-   case PIPE_H265_ENC_PICTURE_TYPE_I:
-   case PIPE_H265_ENC_PICTURE_TYPE_IDR:
+   case PIPE_H2645_ENC_PICTURE_TYPE_I:
+   case PIPE_H2645_ENC_PICTURE_TYPE_IDR:
       radeon_enc_code_fixed_bits(enc, 0x00, 3);
       break;
-   case PIPE_H265_ENC_PICTURE_TYPE_P:
+   case PIPE_H2645_ENC_PICTURE_TYPE_P:
       radeon_enc_code_fixed_bits(enc, 0x01, 3);
       break;
-   case PIPE_H265_ENC_PICTURE_TYPE_B:
+   case PIPE_H2645_ENC_PICTURE_TYPE_B:
       radeon_enc_code_fixed_bits(enc, 0x02, 3);
       break;
    default:
@@ -665,15 +665,15 @@ static void radeon_enc_slice_header(struct radeon_encoder *enc)
    inst_index++;
 
    switch (enc->enc_pic.picture_type) {
-   case PIPE_H264_ENC_PICTURE_TYPE_I:
-   case PIPE_H264_ENC_PICTURE_TYPE_IDR:
+   case PIPE_H2645_ENC_PICTURE_TYPE_I:
+   case PIPE_H2645_ENC_PICTURE_TYPE_IDR:
       radeon_enc_code_fixed_bits(enc, 0x08, 7);
       break;
-   case PIPE_H264_ENC_PICTURE_TYPE_P:
-   case PIPE_H264_ENC_PICTURE_TYPE_SKIP:
+   case PIPE_H2645_ENC_PICTURE_TYPE_P:
+   case PIPE_H2645_ENC_PICTURE_TYPE_SKIP:
       radeon_enc_code_fixed_bits(enc, 0x06, 5);
       break;
-   case PIPE_H264_ENC_PICTURE_TYPE_B:
+   case PIPE_H2645_ENC_PICTURE_TYPE_B:
       radeon_enc_code_fixed_bits(enc, 0x07, 5);
       break;
    default:
@@ -702,7 +702,7 @@ static void radeon_enc_slice_header(struct radeon_encoder *enc)
    if (enc->enc_pic.pic_order_cnt_type == 0)
       radeon_enc_code_fixed_bits(enc, enc->enc_pic.pic_order_cnt % 32, 5);
 
-   if (enc->enc_pic.picture_type != PIPE_H264_ENC_PICTURE_TYPE_IDR) {
+   if (enc->enc_pic.picture_type != PIPE_H2645_ENC_PICTURE_TYPE_IDR) {
       radeon_enc_code_fixed_bits(enc, 0x0, 1);
 
       if (enc->enc_pic.frame_num - enc->enc_pic.ref_idx_l0 > 1) {
@@ -720,7 +720,7 @@ static void radeon_enc_slice_header(struct radeon_encoder *enc)
    } else
       radeon_enc_code_fixed_bits(enc, 0x0, 1);
 
-   if ((enc->enc_pic.picture_type != PIPE_H264_ENC_PICTURE_TYPE_IDR) &&
+   if ((enc->enc_pic.picture_type != PIPE_H2645_ENC_PICTURE_TYPE_IDR) &&
        (enc->enc_pic.spec_misc.cabac_enable))
       radeon_enc_code_ue(enc, enc->enc_pic.spec_misc.cabac_init_idc);
 
@@ -805,15 +805,15 @@ static void radeon_enc_slice_header_hevc(struct radeon_encoder *enc)
    inst_index++;
 
    switch (enc->enc_pic.picture_type) {
-   case PIPE_H265_ENC_PICTURE_TYPE_I:
-   case PIPE_H265_ENC_PICTURE_TYPE_IDR:
+   case PIPE_H2645_ENC_PICTURE_TYPE_I:
+   case PIPE_H2645_ENC_PICTURE_TYPE_IDR:
       radeon_enc_code_ue(enc, 0x2);
       break;
-   case PIPE_H265_ENC_PICTURE_TYPE_P:
-   case PIPE_H265_ENC_PICTURE_TYPE_SKIP:
+   case PIPE_H2645_ENC_PICTURE_TYPE_P:
+   case PIPE_H2645_ENC_PICTURE_TYPE_SKIP:
       radeon_enc_code_ue(enc, 0x1);
       break;
-   case PIPE_H265_ENC_PICTURE_TYPE_B:
+   case PIPE_H2645_ENC_PICTURE_TYPE_B:
       radeon_enc_code_ue(enc, 0x0);
       break;
    default:
@@ -822,7 +822,7 @@ static void radeon_enc_slice_header_hevc(struct radeon_encoder *enc)
 
    if ((enc->enc_pic.nal_unit_type != 19) && (enc->enc_pic.nal_unit_type != 20)) {
       radeon_enc_code_fixed_bits(enc, enc->enc_pic.pic_order_cnt, enc->enc_pic.log2_max_poc);
-      if (enc->enc_pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_P)
+      if (enc->enc_pic.picture_type == PIPE_H2645_ENC_PICTURE_TYPE_P)
          radeon_enc_code_fixed_bits(enc, 0x1, 1);
       else {
          radeon_enc_code_fixed_bits(enc, 0x0, 1);
@@ -832,8 +832,8 @@ static void radeon_enc_slice_header_hevc(struct radeon_encoder *enc)
       }
    }
 
-   if ((enc->enc_pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_P) ||
-       (enc->enc_pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_B)) {
+   if ((enc->enc_pic.picture_type == PIPE_H2645_ENC_PICTURE_TYPE_P) ||
+       (enc->enc_pic.picture_type == PIPE_H2645_ENC_PICTURE_TYPE_B)) {
       radeon_enc_code_fixed_bits(enc, 0x0, 1);
       radeon_enc_code_fixed_bits(enc, enc->enc_pic.hevc_spec_misc.cabac_init_flag, 1);
       radeon_enc_code_ue(enc, 5 - enc->enc_pic.max_num_merge_cand);
@@ -959,17 +959,17 @@ static void radeon_enc_rc_per_pic(struct radeon_encoder *enc)
 static void radeon_enc_encode_params(struct radeon_encoder *enc)
 {
    switch (enc->enc_pic.picture_type) {
-   case PIPE_H264_ENC_PICTURE_TYPE_I:
-   case PIPE_H264_ENC_PICTURE_TYPE_IDR:
+   case PIPE_H2645_ENC_PICTURE_TYPE_I:
+   case PIPE_H2645_ENC_PICTURE_TYPE_IDR:
       enc->enc_pic.enc_params.pic_type = RENCODE_PICTURE_TYPE_I;
       break;
-   case PIPE_H264_ENC_PICTURE_TYPE_P:
+   case PIPE_H2645_ENC_PICTURE_TYPE_P:
       enc->enc_pic.enc_params.pic_type = RENCODE_PICTURE_TYPE_P;
       break;
-   case PIPE_H264_ENC_PICTURE_TYPE_SKIP:
+   case PIPE_H2645_ENC_PICTURE_TYPE_SKIP:
       enc->enc_pic.enc_params.pic_type = RENCODE_PICTURE_TYPE_P_SKIP;
       break;
-   case PIPE_H264_ENC_PICTURE_TYPE_B:
+   case PIPE_H2645_ENC_PICTURE_TYPE_B:
       enc->enc_pic.enc_params.pic_type = RENCODE_PICTURE_TYPE_B;
       break;
    default:
@@ -981,7 +981,7 @@ static void radeon_enc_encode_params(struct radeon_encoder *enc)
    enc->enc_pic.enc_params.input_pic_chroma_pitch = enc->chroma->u.gfx9.surf_pitch;
    enc->enc_pic.enc_params.input_pic_swizzle_mode = RENCODE_INPUT_SWIZZLE_MODE_LINEAR;
 
-   if (enc->enc_pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_IDR)
+   if (enc->enc_pic.picture_type == PIPE_H2645_ENC_PICTURE_TYPE_IDR)
       enc->enc_pic.enc_params.reference_picture_index = 0xFFFFFFFF;
    else
       enc->enc_pic.enc_params.reference_picture_index = (enc->enc_pic.frame_num - 1) % 2;
@@ -1004,17 +1004,17 @@ static void radeon_enc_encode_params(struct radeon_encoder *enc)
 static void radeon_enc_encode_params_hevc(struct radeon_encoder *enc)
 {
    switch (enc->enc_pic.picture_type) {
-   case PIPE_H265_ENC_PICTURE_TYPE_I:
-   case PIPE_H265_ENC_PICTURE_TYPE_IDR:
+   case PIPE_H2645_ENC_PICTURE_TYPE_I:
+   case PIPE_H2645_ENC_PICTURE_TYPE_IDR:
       enc->enc_pic.enc_params.pic_type = RENCODE_PICTURE_TYPE_I;
       break;
-   case PIPE_H265_ENC_PICTURE_TYPE_P:
+   case PIPE_H2645_ENC_PICTURE_TYPE_P:
       enc->enc_pic.enc_params.pic_type = RENCODE_PICTURE_TYPE_P;
       break;
-   case PIPE_H265_ENC_PICTURE_TYPE_SKIP:
+   case PIPE_H2645_ENC_PICTURE_TYPE_SKIP:
       enc->enc_pic.enc_params.pic_type = RENCODE_PICTURE_TYPE_P_SKIP;
       break;
-   case PIPE_H265_ENC_PICTURE_TYPE_B:
+   case PIPE_H2645_ENC_PICTURE_TYPE_B:
       enc->enc_pic.enc_params.pic_type = RENCODE_PICTURE_TYPE_B;
       break;
    default:
diff --git a/src/gallium/drivers/radeon/radeon_vcn_enc_2_0.c b/src/gallium/drivers/radeon/radeon_vcn_enc_2_0.c
index f5f0a5fc3e3..57595746344 100644
--- a/src/gallium/drivers/radeon/radeon_vcn_enc_2_0.c
+++ b/src/gallium/drivers/radeon/radeon_vcn_enc_2_0.c
@@ -124,15 +124,15 @@ static void radeon_enc_slice_header_hevc(struct radeon_encoder *enc)
    inst_index++;
 
    switch (enc->enc_pic.picture_type) {
-   case PIPE_H265_ENC_PICTURE_TYPE_I:
-   case PIPE_H265_ENC_PICTURE_TYPE_IDR:
+   case PIPE_H2645_ENC_PICTURE_TYPE_I:
+   case PIPE_H2645_ENC_PICTURE_TYPE_IDR:
       radeon_enc_code_ue(enc, 0x2);
       break;
-   case PIPE_H265_ENC_PICTURE_TYPE_P:
-   case PIPE_H265_ENC_PICTURE_TYPE_SKIP:
+   case PIPE_H2645_ENC_PICTURE_TYPE_P:
+   case PIPE_H2645_ENC_PICTURE_TYPE_SKIP:
       radeon_enc_code_ue(enc, 0x1);
       break;
-   case PIPE_H265_ENC_PICTURE_TYPE_B:
+   case PIPE_H2645_ENC_PICTURE_TYPE_B:
       radeon_enc_code_ue(enc, 0x0);
       break;
    default:
@@ -141,7 +141,7 @@ static void radeon_enc_slice_header_hevc(struct radeon_encoder *enc)
 
    if ((enc->enc_pic.nal_unit_type != 19) && (enc->enc_pic.nal_unit_type != 20)) {
       radeon_enc_code_fixed_bits(enc, enc->enc_pic.pic_order_cnt, enc->enc_pic.log2_max_poc);
-      if (enc->enc_pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_P)
+      if (enc->enc_pic.picture_type == PIPE_H2645_ENC_PICTURE_TYPE_P)
          radeon_enc_code_fixed_bits(enc, 0x1, 1);
       else {
          radeon_enc_code_fixed_bits(enc, 0x0, 1);
@@ -162,8 +162,8 @@ static void radeon_enc_slice_header_hevc(struct radeon_encoder *enc)
       inst_index++;
    }
 
-   if ((enc->enc_pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_P) ||
-       (enc->enc_pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_B)) {
+   if ((enc->enc_pic.picture_type == PIPE_H2645_ENC_PICTURE_TYPE_P) ||
+       (enc->enc_pic.picture_type == PIPE_H2645_ENC_PICTURE_TYPE_B)) {
       radeon_enc_code_fixed_bits(enc, 0x0, 1);
       radeon_enc_code_fixed_bits(enc, enc->enc_pic.hevc_spec_misc.cabac_init_flag, 1);
       radeon_enc_code_ue(enc, 5 - enc->enc_pic.max_num_merge_cand);
diff --git a/src/gallium/frontends/omx/bellagio/vid_enc.c b/src/gallium/frontends/omx/bellagio/vid_enc.c
index ff9efb0e6a9..c0a174c5a81 100644
--- a/src/gallium/frontends/omx/bellagio/vid_enc.c
+++ b/src/gallium/frontends/omx/bellagio/vid_enc.c
@@ -781,7 +781,7 @@ static void enc_ControlPicture(omx_base_PortType *port, struct pipe_h264_enc_pic
 }
 
 static void enc_HandleTask(omx_base_PortType *port, struct encode_task *task,
-                           enum pipe_h264_enc_picture_type picture_type)
+                           enum pipe_h2645_enc_picture_type picture_type)
 {
    OMX_COMPONENTTYPE* comp = port->standCompContainer;
    vid_enc_PrivateType *priv = comp->pComponentPrivate;
@@ -803,7 +803,7 @@ static void enc_HandleTask(omx_base_PortType *port, struct encode_task *task,
    picture.pic_order_cnt = task->pic_order_cnt;
    picture.base.profile = enc_TranslateOMXProfileToPipe(priv->profile_level.eProfile);
    picture.base.entry_point = PIPE_VIDEO_ENTRYPOINT_ENCODE;
-   if (priv->restricted_b_frames && picture_type == PIPE_H264_ENC_PICTURE_TYPE_B)
+   if (priv->restricted_b_frames && picture_type == PIPE_H2645_ENC_PICTURE_TYPE_B)
       picture.not_referenced = true;
    enc_ControlPicture(port, &picture);
 
@@ -827,13 +827,13 @@ static void enc_ClearBframes(omx_base_PortType *port, struct input_buf_private *
 
    /* promote last from to P frame */
    priv->ref_idx_l0 = priv->ref_idx_l1;
-   enc_HandleTask(port, task, PIPE_H264_ENC_PICTURE_TYPE_P);
+   enc_HandleTask(port, task, PIPE_H2645_ENC_PICTURE_TYPE_P);
    list_addtail(&task->list, &inp->tasks);
    priv->ref_idx_l1 = priv->frame_num++;
 
    /* handle B frames */
    LIST_FOR_EACH_ENTRY(task, &priv->b_frames, list) {
-      enc_HandleTask(port, task, PIPE_H264_ENC_PICTURE_TYPE_B);
+      enc_HandleTask(port, task, PIPE_H2645_ENC_PICTURE_TYPE_B);
       if (!priv->restricted_b_frames)
          priv->ref_idx_l0 = priv->frame_num;
       priv->frame_num++;
@@ -847,7 +847,7 @@ static OMX_ERRORTYPE vid_enc_EncodeFrame(omx_base_PortType *port, OMX_BUFFERHEAD
    OMX_COMPONENTTYPE* comp = port->standCompContainer;
    vid_enc_PrivateType *priv = comp->pComponentPrivate;
    struct input_buf_private *inp = buf->pInputPortPrivate;
-   enum pipe_h264_enc_picture_type picture_type;
+   enum pipe_h2645_enc_picture_type picture_type;
    struct encode_task *task;
    unsigned stacked_num = 0;
    OMX_ERRORTYPE err;
@@ -884,21 +884,21 @@ static OMX_ERRORTYPE vid_enc_EncodeFrame(omx_base_PortType *port, OMX_BUFFERHEAD
    if (!(priv->pic_order_cnt % OMX_VID_ENC_IDR_PERIOD_DEFAULT) ||
        priv->force_pic_type.IntraRefreshVOP) {
       enc_ClearBframes(port, inp);
-      picture_type = PIPE_H264_ENC_PICTURE_TYPE_IDR;
+      picture_type = PIPE_H2645_ENC_PICTURE_TYPE_IDR;
       priv->force_pic_type.IntraRefreshVOP = OMX_FALSE;
       priv->frame_num = 0;
       priv->pic_order_cnt = 0;
    } else if (priv->codec->profile == PIPE_VIDEO_PROFILE_MPEG4_AVC_BASELINE ||
               !(priv->pic_order_cnt % OMX_VID_ENC_P_PERIOD_DEFAULT) ||
               (buf->nFlags & OMX_BUFFERFLAG_EOS)) {
-      picture_type = PIPE_H264_ENC_PICTURE_TYPE_P;
+      picture_type = PIPE_H2645_ENC_PICTURE_TYPE_P;
    } else {
-      picture_type = PIPE_H264_ENC_PICTURE_TYPE_B;
+      picture_type = PIPE_H2645_ENC_PICTURE_TYPE_B;
    }
 
    task->pic_order_cnt = priv->pic_order_cnt++;
 
-   if (picture_type == PIPE_H264_ENC_PICTURE_TYPE_B) {
+   if (picture_type == PIPE_H2645_ENC_PICTURE_TYPE_B) {
       /* put frame at the tail of the queue */
       list_addtail(&task->list, &priv->b_frames);
    } else {
@@ -919,7 +919,7 @@ static OMX_ERRORTYPE vid_enc_EncodeFrame(omx_base_PortType *port, OMX_BUFFERHEAD
 
       /* handle B frames */
       LIST_FOR_EACH_ENTRY(task, &priv->b_frames, list) {
-         enc_HandleTask(port, task, PIPE_H264_ENC_PICTURE_TYPE_B);
+         enc_HandleTask(port, task, PIPE_H2645_ENC_PICTURE_TYPE_B);
          if (!priv->restricted_b_frames)
             priv->ref_idx_l0 = priv->frame_num;
          priv->frame_num++;
diff --git a/src/gallium/frontends/omx/tizonia/h264eprc.c b/src/gallium/frontends/omx/tizonia/h264eprc.c
index b52e489f21c..b744ebb81a8 100644
--- a/src/gallium/frontends/omx/tizonia/h264eprc.c
+++ b/src/gallium/frontends/omx/tizonia/h264eprc.c
@@ -236,7 +236,7 @@ static void enc_ScaleInput(vid_enc_PrivateType * priv, struct pipe_video_buffer
 }
 
 static void enc_HandleTask(vid_enc_PrivateType * priv, struct encode_task *task,
-                           enum pipe_h264_enc_picture_type picture_type)
+                           enum pipe_h2645_enc_picture_type picture_type)
 {
    unsigned size = priv->out_port_def_.nBufferSize;
    struct pipe_video_buffer *vbuf = task->buf;
@@ -254,7 +254,7 @@ static void enc_HandleTask(vid_enc_PrivateType * priv, struct encode_task *task,
 
    picture.picture_type = picture_type;
    picture.pic_order_cnt = task->pic_order_cnt;
-   if (priv->restricted_b_frames && picture_type == PIPE_H264_ENC_PICTURE_TYPE_B)
+   if (priv->restricted_b_frames && picture_type == PIPE_H2645_ENC_PICTURE_TYPE_B)
       picture.not_referenced = true;
    enc_ControlPicture_common(priv, &picture);
 
@@ -276,13 +276,13 @@ static void enc_ClearBframes(vid_enc_PrivateType * priv, struct input_buf_privat
 
    /* promote last from to P frame */
    priv->ref_idx_l0 = priv->ref_idx_l1;
-   enc_HandleTask(priv, task, PIPE_H264_ENC_PICTURE_TYPE_P);
+   enc_HandleTask(priv, task, PIPE_H2645_ENC_PICTURE_TYPE_P);
    list_addtail(&task->list, &inp->tasks);
    priv->ref_idx_l1 = priv->frame_num++;
 
    /* handle B frames */
    LIST_FOR_EACH_ENTRY(task, &priv->b_frames, list) {
-      enc_HandleTask(priv, task, PIPE_H264_ENC_PICTURE_TYPE_B);
+      enc_HandleTask(priv, task, PIPE_H2645_ENC_PICTURE_TYPE_B);
       if (!priv->restricted_b_frames)
          priv->ref_idx_l0 = priv->frame_num;
       priv->frame_num++;
@@ -301,7 +301,7 @@ static OMX_ERRORTYPE enc_LoadImage(vid_enc_PrivateType * priv, OMX_BUFFERHEADERT
 static OMX_ERRORTYPE encode_frame(vid_enc_PrivateType * priv, OMX_BUFFERHEADERTYPE * in_buf)
 {
    struct input_buf_private *inp = in_buf->pInputPortPrivate;
-   enum pipe_h264_enc_picture_type picture_type;
+   enum pipe_h2645_enc_picture_type picture_type;
    struct encode_task *task;
    unsigned stacked_num = 0;
    OMX_ERRORTYPE err;
@@ -339,20 +339,20 @@ static OMX_ERRORTYPE encode_frame(vid_enc_PrivateType * priv, OMX_BUFFERHEADERTY
    if (!(priv->pic_order_cnt % OMX_VID_ENC_IDR_PERIOD_DEFAULT) ||
        priv->force_pic_type.IntraRefreshVOP) {
       enc_ClearBframes(priv, inp);
-      picture_type = PIPE_H264_ENC_PICTURE_TYPE_IDR;
+      picture_type = PIPE_H2645_ENC_PICTURE_TYPE_IDR;
       priv->force_pic_type.IntraRefreshVOP = OMX_FALSE;
       priv->frame_num = 0;
    } else if (priv->codec->profile == PIPE_VIDEO_PROFILE_MPEG4_AVC_BASELINE ||
               !(priv->pic_order_cnt % OMX_VID_ENC_P_PERIOD_DEFAULT) ||
               (in_buf->nFlags & OMX_BUFFERFLAG_EOS)) {
-      picture_type = PIPE_H264_ENC_PICTURE_TYPE_P;
+      picture_type = PIPE_H2645_ENC_PICTURE_TYPE_P;
    } else {
-      picture_type = PIPE_H264_ENC_PICTURE_TYPE_B;
+      picture_type = PIPE_H2645_ENC_PICTURE_TYPE_B;
    }
 
    task->pic_order_cnt = priv->pic_order_cnt++;
 
-   if (picture_type == PIPE_H264_ENC_PICTURE_TYPE_B) {
+   if (picture_type == PIPE_H2645_ENC_PICTURE_TYPE_B) {
       /* put frame at the tail of the queue */
       list_addtail(&task->list, &priv->b_frames);
    } else {
@@ -373,7 +373,7 @@ static OMX_ERRORTYPE encode_frame(vid_enc_PrivateType * priv, OMX_BUFFERHEADERTY
 
       /* handle B frames */
       LIST_FOR_EACH_ENTRY(task, &priv->b_frames, list) {
-         enc_HandleTask(priv, task, PIPE_H264_ENC_PICTURE_TYPE_B);
+         enc_HandleTask(priv, task, PIPE_H2645_ENC_PICTURE_TYPE_B);
          if (!priv->restricted_b_frames)
             priv->ref_idx_l0 = priv->frame_num;
          priv->frame_num++;
diff --git a/src/gallium/frontends/omx/vid_enc_common.c b/src/gallium/frontends/omx/vid_enc_common.c
index 9d64f4358cd..8fdea6c032b 100644
--- a/src/gallium/frontends/omx/vid_enc_common.c
+++ b/src/gallium/frontends/omx/vid_enc_common.c
@@ -252,26 +252,26 @@ void enc_ControlPicture_common(vid_enc_PrivateType * priv, struct pipe_h264_enc_
    /* Get bitrate from port */
    switch (priv->bitrate.eControlRate) {
    case OMX_Video_ControlRateVariable:
-      rate_ctrl->rate_ctrl_method = PIPE_H264_ENC_RATE_CONTROL_METHOD_VARIABLE;
+      rate_ctrl->rate_ctrl_method = PIPE_H2645_ENC_RATE_CONTROL_METHOD_VARIABLE;
       break;
    case OMX_Video_ControlRateConstant:
-      rate_ctrl->rate_ctrl_method = PIPE_H264_ENC_RATE_CONTROL_METHOD_CONSTANT;
+      rate_ctrl->rate_ctrl_method = PIPE_H2645_ENC_RATE_CONTROL_METHOD_CONSTANT;
       break;
    case OMX_Video_ControlRateVariableSkipFrames:
-      rate_ctrl->rate_ctrl_method = PIPE_H264_ENC_RATE_CONTROL_METHOD_VARIABLE_SKIP;
+      rate_ctrl->rate_ctrl_method = PIPE_H2645_ENC_RATE_CONTROL_METHOD_VARIABLE_SKIP;
       break;
    case OMX_Video_ControlRateConstantSkipFrames:
-      rate_ctrl->rate_ctrl_method = PIPE_H264_ENC_RATE_CONTROL_METHOD_CONSTANT_SKIP;
+      rate_ctrl->rate_ctrl_method = PIPE_H2645_ENC_RATE_CONTROL_METHOD_CONSTANT_SKIP;
       break;
    default:
-      rate_ctrl->rate_ctrl_method = PIPE_H264_ENC_RATE_CONTROL_METHOD_DISABLE;
+      rate_ctrl->rate_ctrl_method = PIPE_H2645_ENC_RATE_CONTROL_METHOD_DISABLE;
       break;
    }
 
    rate_ctrl->frame_rate_den = OMX_VID_ENC_CONTROL_FRAME_RATE_DEN_DEFAULT;
    rate_ctrl->frame_rate_num = ((priv->frame_rate) >> 16) * rate_ctrl->frame_rate_den;
 
-   if (rate_ctrl->rate_ctrl_method != PIPE_H264_ENC_RATE_CONTROL_METHOD_DISABLE) {
+   if (rate_ctrl->rate_ctrl_method != PIPE_H2645_ENC_RATE_CONTROL_METHOD_DISABLE) {
       if (priv->bitrate.nTargetBitrate < OMX_VID_ENC_BITRATE_MIN)
          rate_ctrl->target_bitrate = OMX_VID_ENC_BITRATE_MIN;
       else if (priv->bitrate.nTargetBitrate < OMX_VID_ENC_BITRATE_MAX)
diff --git a/src/gallium/frontends/va/config.c b/src/gallium/frontends/va/config.c
index 66ed913e7e0..4c59eed051c 100644
--- a/src/gallium/frontends/va/config.c
+++ b/src/gallium/frontends/va/config.c
@@ -283,11 +283,11 @@ vlVaCreateConfig(VADriverContextP ctx, VAProfile profile, VAEntrypoint entrypoin
    for (int i = 0; i <num_attribs ; i++) {
       if (attrib_list[i].type == VAConfigAttribRateControl) {
          if (attrib_list[i].value == VA_RC_CBR)
-            config->rc = PIPE_H264_ENC_RATE_CONTROL_METHOD_CONSTANT;
+            config->rc = PIPE_H2645_ENC_RATE_CONTROL_METHOD_CONSTANT;
          else if (attrib_list[i].value == VA_RC_VBR)
-            config->rc = PIPE_H264_ENC_RATE_CONTROL_METHOD_VARIABLE;
+            config->rc = PIPE_H2645_ENC_RATE_CONTROL_METHOD_VARIABLE;
          else
-            config->rc = PIPE_H264_ENC_RATE_CONTROL_METHOD_DISABLE;
+            config->rc = PIPE_H2645_ENC_RATE_CONTROL_METHOD_DISABLE;
       }
       if (attrib_list[i].type == VAConfigAttribRTFormat) {
          if (attrib_list[i].value & supported_rt_formats) {
diff --git a/src/gallium/frontends/va/picture_h264_enc.c b/src/gallium/frontends/va/picture_h264_enc.c
index 8ee27d2cb29..4dfeecccef7 100644
--- a/src/gallium/frontends/va/picture_h264_enc.c
+++ b/src/gallium/frontends/va/picture_h264_enc.c
@@ -57,9 +57,9 @@ vlVaHandleVAEncPictureParameterBufferTypeH264(vlVaDriver *drv, vlVaContext *cont
 		       UINT_TO_PTR(h264->frame_num));
 
    if (h264->pic_fields.bits.idr_pic_flag == 1)
-      context->desc.h264enc.picture_type = PIPE_H264_ENC_PICTURE_TYPE_IDR;
+      context->desc.h264enc.picture_type = PIPE_H2645_ENC_PICTURE_TYPE_IDR;
    else
-      context->desc.h264enc.picture_type = PIPE_H264_ENC_PICTURE_TYPE_P;
+      context->desc.h264enc.picture_type = PIPE_H2645_ENC_PICTURE_TYPE_P;
 
    context->desc.h264enc.quant_i_frames = h264->pic_init_qp;
    context->desc.h264enc.quant_b_frames = h264->pic_init_qp;
@@ -94,16 +94,16 @@ vlVaHandleVAEncSliceParameterBufferTypeH264(vlVaDriver *drv, vlVaContext *contex
    }
 
    if (h264->slice_type == 1)
-      context->desc.h264enc.picture_type = PIPE_H264_ENC_PICTURE_TYPE_B;
+      context->desc.h264enc.picture_type = PIPE_H2645_ENC_PICTURE_TYPE_B;
    else if (h264->slice_type == 0)
-      context->desc.h264enc.picture_type = PIPE_H264_ENC_PICTURE_TYPE_P;
+      context->desc.h264enc.picture_type = PIPE_H2645_ENC_PICTURE_TYPE_P;
    else if (h264->slice_type == 2) {
-      if (context->desc.h264enc.picture_type == PIPE_H264_ENC_PICTURE_TYPE_IDR)
+      if (context->desc.h264enc.picture_type == PIPE_H2645_ENC_PICTURE_TYPE_IDR)
          context->desc.h264enc.idr_pic_id++;
 	   else
-         context->desc.h264enc.picture_type = PIPE_H264_ENC_PICTURE_TYPE_I;
+         context->desc.h264enc.picture_type = PIPE_H2645_ENC_PICTURE_TYPE_I;
    } else
-      context->desc.h264enc.picture_type = PIPE_H264_ENC_PICTURE_TYPE_SKIP;
+      context->desc.h264enc.picture_type = PIPE_H2645_ENC_PICTURE_TYPE_SKIP;
 
    return VA_STATUS_SUCCESS;
 }
@@ -143,7 +143,7 @@ vlVaHandleVAEncMiscParameterTypeRateControlH264(vlVaContext *context, VAEncMiscP
 {
    VAEncMiscParameterRateControl *rc = (VAEncMiscParameterRateControl *)misc->data;
    if (context->desc.h264enc.rate_ctrl.rate_ctrl_method ==
-         PIPE_H264_ENC_RATE_CONTROL_METHOD_CONSTANT)
+         PIPE_H2645_ENC_RATE_CONTROL_METHOD_CONSTANT)
       context->desc.h264enc.rate_ctrl.target_bitrate = rc->bits_per_second;
    else
       context->desc.h264enc.rate_ctrl.target_bitrate = rc->bits_per_second * (rc->target_percentage / 100.0);
diff --git a/src/gallium/frontends/va/picture_hevc_enc.c b/src/gallium/frontends/va/picture_hevc_enc.c
index 96420b35fb2..74857461764 100644
--- a/src/gallium/frontends/va/picture_hevc_enc.c
+++ b/src/gallium/frontends/va/picture_hevc_enc.c
@@ -66,12 +66,12 @@ vlVaHandleVAEncPictureParameterBufferTypeHEVC(vlVaDriver *drv, vlVaContext *cont
    switch(h265->pic_fields.bits.coding_type) {
    case 1:
       if (h265->pic_fields.bits.idr_pic_flag)
-         context->desc.h265enc.picture_type = PIPE_H265_ENC_PICTURE_TYPE_IDR;
+         context->desc.h265enc.picture_type = PIPE_H2645_ENC_PICTURE_TYPE_IDR;
       else
-         context->desc.h265enc.picture_type = PIPE_H265_ENC_PICTURE_TYPE_I;
+         context->desc.h265enc.picture_type = PIPE_H2645_ENC_PICTURE_TYPE_I;
       break;
    case 2:
-      context->desc.h265enc.picture_type = PIPE_H265_ENC_PICTURE_TYPE_P;
+      context->desc.h265enc.picture_type = PIPE_H2645_ENC_PICTURE_TYPE_P;
       break;
    case 3:
    case 4:
@@ -168,7 +168,7 @@ vlVaHandleVAEncMiscParameterTypeRateControlHEVC(vlVaContext *context, VAEncMiscP
    VAEncMiscParameterRateControl *rc = (VAEncMiscParameterRateControl *)misc->data;
 
    if (context->desc.h265enc.rc.rate_ctrl_method ==
-         PIPE_H265_ENC_RATE_CONTROL_METHOD_CONSTANT)
+         PIPE_H2645_ENC_RATE_CONTROL_METHOD_CONSTANT)
       context->desc.h265enc.rc.target_bitrate = rc->bits_per_second;
    else
       context->desc.h265enc.rc.target_bitrate = rc->bits_per_second * (rc->target_percentage / 100.0);
diff --git a/src/gallium/frontends/va/va_private.h b/src/gallium/frontends/va/va_private.h
index 81922c2706b..17bd024c1a7 100644
--- a/src/gallium/frontends/va/va_private.h
+++ b/src/gallium/frontends/va/va_private.h
@@ -318,7 +318,7 @@ typedef struct {
 typedef struct {
    enum pipe_video_profile profile;
    enum pipe_video_entrypoint entrypoint;
-   enum pipe_h264_enc_rate_control_method rc;
+   enum pipe_h2645_enc_rate_control_method rc;
    unsigned int rt_format;
 } vlVaConfig;
 
diff --git a/src/gallium/include/pipe/p_video_state.h b/src/gallium/include/pipe/p_video_state.h
index 9c757a15d0b..002c293298b 100644
--- a/src/gallium/include/pipe/p_video_state.h
+++ b/src/gallium/include/pipe/p_video_state.h
@@ -111,40 +111,23 @@ enum pipe_h264_slice_type
    PIPE_H264_SLICE_TYPE_SI = 0x4
 };
 
-enum pipe_h264_enc_picture_type
+/* Same enum for h264/h265 */
+enum pipe_h2645_enc_picture_type
 {
-   PIPE_H264_ENC_PICTURE_TYPE_P = 0x00,
-   PIPE_H264_ENC_PICTURE_TYPE_B = 0x01,
-   PIPE_H264_ENC_PICTURE_TYPE_I = 0x02,
-   PIPE_H264_ENC_PICTURE_TYPE_IDR = 0x03,
-   PIPE_H264_ENC_PICTURE_TYPE_SKIP = 0x04
+   PIPE_H2645_ENC_PICTURE_TYPE_P = 0x00,
+   PIPE_H2645_ENC_PICTURE_TYPE_B = 0x01,
+   PIPE_H2645_ENC_PICTURE_TYPE_I = 0x02,
+   PIPE_H2645_ENC_PICTURE_TYPE_IDR = 0x03,
+   PIPE_H2645_ENC_PICTURE_TYPE_SKIP = 0x04
 };
 
-enum pipe_h265_enc_picture_type
+enum pipe_h2645_enc_rate_control_method
 {
-   PIPE_H265_ENC_PICTURE_TYPE_P = 0x00,
-   PIPE_H265_ENC_PICTURE_TYPE_B = 0x01,
-   PIPE_H265_ENC_PICTURE_TYPE_I = 0x02,
-   PIPE_H265_ENC_PICTURE_TYPE_IDR = 0x03,
-   PIPE_H265_ENC_PICTURE_TYPE_SKIP = 0x04
-};
-
-enum pipe_h264_enc_rate_control_method
-{
-   PIPE_H264_ENC_RATE_CONTROL_METHOD_DISABLE = 0x00,
-   PIPE_H264_ENC_RATE_CONTROL_METHOD_CONSTANT_SKIP = 0x01,
-   PIPE_H264_ENC_RATE_CONTROL_METHOD_VARIABLE_SKIP = 0x02,
-   PIPE_H264_ENC_RATE_CONTROL_METHOD_CONSTANT = 0x03,
-   PIPE_H264_ENC_RATE_CONTROL_METHOD_VARIABLE = 0x04
-};
-
-enum pipe_h265_enc_rate_control_method
-{
-   PIPE_H265_ENC_RATE_CONTROL_METHOD_DISABLE = 0x00,
-   PIPE_H265_ENC_RATE_CONTROL_METHOD_CONSTANT_SKIP = 0x01,
-   PIPE_H265_ENC_RATE_CONTROL_METHOD_VARIABLE_SKIP = 0x02,
-   PIPE_H265_ENC_RATE_CONTROL_METHOD_CONSTANT = 0x03,
-   PIPE_H265_ENC_RATE_CONTROL_METHOD_VARIABLE = 0x04
+   PIPE_H2645_ENC_RATE_CONTROL_METHOD_DISABLE = 0x00,
+   PIPE_H2645_ENC_RATE_CONTROL_METHOD_CONSTANT_SKIP = 0x01,
+   PIPE_H2645_ENC_RATE_CONTROL_METHOD_VARIABLE_SKIP = 0x02,
+   PIPE_H2645_ENC_RATE_CONTROL_METHOD_CONSTANT = 0x03,
+   PIPE_H2645_ENC_RATE_CONTROL_METHOD_VARIABLE = 0x04
 };
 
 struct pipe_picture_desc
@@ -368,7 +351,7 @@ struct pipe_h264_picture_desc
 
 struct pipe_h264_enc_rate_control
 {
-   enum pipe_h264_enc_rate_control_method rate_ctrl_method;
+   enum pipe_h2645_enc_rate_control_method rate_ctrl_method;
    unsigned target_bitrate;
    unsigned peak_bitrate;
    unsigned frame_rate_num;
@@ -417,7 +400,7 @@ struct pipe_h264_enc_picture_desc
    unsigned quant_p_frames;
    unsigned quant_b_frames;
 
-   enum pipe_h264_enc_picture_type picture_type;
+   enum pipe_h2645_enc_picture_type picture_type;
    unsigned frame_num;
    unsigned frame_num_cnt;
    unsigned p_remain;
@@ -487,7 +470,7 @@ struct pipe_h265_enc_slice_param
 
 struct pipe_h265_enc_rate_control
 {
-   enum pipe_h265_enc_rate_control_method rate_ctrl_method;
+   enum pipe_h2645_enc_rate_control_method rate_ctrl_method;
    unsigned target_bitrate;
    unsigned peak_bitrate;
    unsigned frame_rate_num;
@@ -511,7 +494,7 @@ struct pipe_h265_enc_picture_desc
    struct pipe_h265_enc_slice_param slice;
    struct pipe_h265_enc_rate_control rc;
 
-   enum pipe_h265_enc_picture_type picture_type;
+   enum pipe_h2645_enc_picture_type picture_type;
    unsigned decoded_curr_pic;
    unsigned reference_frames[16];
    unsigned frame_num;