intel/brw: Add phases to backend

The general idea is to be able to validate that certain instructions
were lowered and certain restrictions were already handled.  Passes can
now assert their expectations, i.e. if a pass is mean to run after
certain lowerings or not.

The actual phases are a initial stab and as we re-organized the passes,
we may remove/add phases.

This commit just add some phase steps, later commits will make use of
them.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30496>

This commit is contained in:

Caio Oliveira

2024-08-27 10:16:11 -07:00

committed by

Marge Bot

parent 21f78454bf

commit affa7567c2

6 changed files with 39 additions and 0 deletions

									
										src/intel/compiler/brw_fs_nir.cpp
									
		+2
		
												View File
												
				@@ -8432,4 +8432,6 @@ nir_to_brw(fs_visitor *s)

				   ntb.bld.emit(SHADER_OPCODE_HALT_TARGET);

				   ralloc_free(ntb.mem_ctx);

				   brw_shader_phase_update(*s, BRW_SHADER_PHASE_AFTER_NIR);

				}