From ae3af4c73a270c2beedc5678372bfbbea34c5e14 Mon Sep 17 00:00:00 2001 From: Alyssa Rosenzweig Date: Sun, 16 Jun 2024 15:38:15 -0400 Subject: [PATCH] nir: document restriction on load_smem_amd constantness This came up while reviewing https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29398 ... Possibly this intrinsic should be renamed to load_smem_constant_amd for consistency with load_global_constant. But if we're not going to convey constantness in the intrinsic name, let's at least document the restriction, because NIR's optimizer relies on it. (I didn't inspect every call site, but it looks like load_smem_amd is just used for descriptor loads so there's no bug to fix.) Signed-off-by: Alyssa Rosenzweig Reviewed-by: Rhys Perry Part-of: --- src/compiler/nir/nir_intrinsics.py | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/src/compiler/nir/nir_intrinsics.py b/src/compiler/nir/nir_intrinsics.py index 131ae7dbbdc..5072ade0449 100644 --- a/src/compiler/nir/nir_intrinsics.py +++ b/src/compiler/nir/nir_intrinsics.py @@ -1655,6 +1655,10 @@ store("scalar_arg_amd", [], [BASE]) store("vector_arg_amd", [], [BASE]) # src[] = { 32/64-bit base address, 32-bit offset }. +# +# Similar to load_global_constant, the memory accessed must be read-only. This +# restriction justifies the CAN_REORDER flag. Additionally, the base/offset must +# be subgroup uniform. intrinsic("load_smem_amd", src_comp=[1, 1], dest_comp=0, bit_sizes=[32], indices=[ALIGN_MUL, ALIGN_OFFSET], flags=[CAN_ELIMINATE, CAN_REORDER])