From adadb097a34ae411ee81ca066d1b340a12faeb56 Mon Sep 17 00:00:00 2001 From: Boris Brezillon Date: Tue, 17 Sep 2024 16:36:19 +0200 Subject: [PATCH] nir/lower_ssbo: Add an option to conditionally lower loads On Mali(Valhall), we have a way to load SSBO data without going through an SSBO index -> global address translation, so let's provide a way to tell nir_lower_ssbo() when it shouldn't lower loads. Signed-off-by: Boris Brezillon Reviewed-by: Alyssa Rosenzweig Acked-by: Eric R. Smith Part-of: --- src/compiler/nir/nir.h | 8 +++++++- src/compiler/nir/nir_lower_ssbo.c | 11 ++++++++--- src/gallium/drivers/asahi/agx_state.c | 2 +- src/panfrost/compiler/bifrost_compile.c | 2 +- src/panfrost/midgard/midgard_compile.c | 2 +- 5 files changed, 18 insertions(+), 7 deletions(-) diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h index 4acf970e8bf..0814d263a7d 100644 --- a/src/compiler/nir/nir.h +++ b/src/compiler/nir/nir.h @@ -6637,7 +6637,13 @@ bool nir_rematerialize_derefs_in_use_blocks_impl(nir_function_impl *impl); bool nir_lower_samplers(nir_shader *shader); bool nir_lower_cl_images(nir_shader *shader, bool lower_image_derefs, bool lower_sampler_derefs); bool nir_dedup_inline_samplers(nir_shader *shader); -bool nir_lower_ssbo(nir_shader *shader); + +typedef struct nir_lower_ssbo_options { + bool native_loads; +} nir_lower_ssbo_options; + +bool nir_lower_ssbo(nir_shader *shader, const nir_lower_ssbo_options *opts); + bool nir_lower_helper_writes(nir_shader *shader, bool lower_plain_stores); typedef struct nir_lower_printf_options { diff --git a/src/compiler/nir/nir_lower_ssbo.c b/src/compiler/nir/nir_lower_ssbo.c index ff86b6fe628..f8be6fdfcd3 100644 --- a/src/compiler/nir/nir_lower_ssbo.c +++ b/src/compiler/nir/nir_lower_ssbo.c @@ -22,13 +22,18 @@ calc_address(nir_builder *b, nir_intrinsic_instr *intr) } static bool -pass(nir_builder *b, nir_intrinsic_instr *intr, UNUSED void *data) +pass(nir_builder *b, nir_intrinsic_instr *intr, void *data) { + const nir_lower_ssbo_options *opts = data; + b->cursor = nir_before_instr(&intr->instr); nir_def *def = NULL; switch (intr->intrinsic) { case nir_intrinsic_load_ssbo: + if (opts && opts->native_loads) + return false; + def = nir_build_load_global(b, intr->def.num_components, intr->def.bit_size, calc_address(b, intr), .align_mul = nir_intrinsic_align_mul(intr), @@ -66,9 +71,9 @@ pass(nir_builder *b, nir_intrinsic_instr *intr, UNUSED void *data) } bool -nir_lower_ssbo(nir_shader *shader) +nir_lower_ssbo(nir_shader *shader, const nir_lower_ssbo_options *opts) { return nir_shader_intrinsics_pass(shader, pass, nir_metadata_control_flow, - NULL); + (void *)opts); } diff --git a/src/gallium/drivers/asahi/agx_state.c b/src/gallium/drivers/asahi/agx_state.c index df4e001f99a..2142701840c 100644 --- a/src/gallium/drivers/asahi/agx_state.c +++ b/src/gallium/drivers/asahi/agx_state.c @@ -1862,7 +1862,7 @@ agx_shader_initialize(struct agx_device *dev, struct agx_uncompiled_shader *so, } NIR_PASS(_, nir, agx_nir_lower_texture); - NIR_PASS(_, nir, nir_lower_ssbo); + NIR_PASS(_, nir, nir_lower_ssbo, NULL); agx_preprocess_nir(nir, dev->libagx); diff --git a/src/panfrost/compiler/bifrost_compile.c b/src/panfrost/compiler/bifrost_compile.c index c1a2b492362..3bd2c6157d8 100644 --- a/src/panfrost/compiler/bifrost_compile.c +++ b/src/panfrost/compiler/bifrost_compile.c @@ -5085,7 +5085,7 @@ bifrost_preprocess_nir(nir_shader *nir, unsigned gpu_id) bi_lower_load_push_const_with_dyn_offset, nir_metadata_control_flow, NULL); - NIR_PASS_V(nir, nir_lower_ssbo); + NIR_PASS_V(nir, nir_lower_ssbo, NULL); NIR_PASS_V(nir, pan_lower_sample_pos); NIR_PASS_V(nir, nir_lower_bit_size, bi_lower_bit_size, NULL); NIR_PASS_V(nir, nir_lower_64bit_phis); diff --git a/src/panfrost/midgard/midgard_compile.c b/src/panfrost/midgard/midgard_compile.c index 6b8d7d37f41..be3989c67c1 100644 --- a/src/panfrost/midgard/midgard_compile.c +++ b/src/panfrost/midgard/midgard_compile.c @@ -359,7 +359,7 @@ midgard_preprocess_nir(nir_shader *nir, unsigned gpu_id) NIR_PASS_V(nir, pan_nir_lower_store_component); } - NIR_PASS_V(nir, nir_lower_ssbo); + NIR_PASS_V(nir, nir_lower_ssbo, NULL); NIR_PASS_V(nir, pan_nir_lower_zs_store); NIR_PASS_V(nir, nir_lower_frexp);