From acf953757ef6c567dded4987599502780412a1f2 Mon Sep 17 00:00:00 2001 From: Lionel Landwerlin Date: Wed, 8 Oct 2025 09:00:15 +0300 Subject: [PATCH] brw: prevent LOAD_REG modifications on MOV_INDIRECT/BROADCAST Due to those opcode reading variable amount of data in src0, it's not possible to easily figure out what builder SIMD size should be used to produce the LOAD_REG replacement. Signed-off-by: Lionel Landwerlin Fixes: 2d13acf9d9 ("brw: Add passes to generate and lower load_reg") Fixes: 93996c07e2 ("brw: fix broadcast opcode") Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14054 Reviewed-by: Ian Romanick Part-of: --- src/intel/compiler/brw_load_reg.cpp | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/src/intel/compiler/brw_load_reg.cpp b/src/intel/compiler/brw_load_reg.cpp index d2d2e6c9595..044a18823f2 100644 --- a/src/intel/compiler/brw_load_reg.cpp +++ b/src/intel/compiler/brw_load_reg.cpp @@ -27,12 +27,17 @@ brw_insert_load_reg(brw_shader &s) /* These should not exist yet. */ assert(inst->opcode != SHADER_OPCODE_LOAD_REG); - /* These opcodes may have the right source and destination patterns to - * have their sources replaced by load_reg, but these instructions are - * special and / or wierd. They should not be modified. + /* UNDEF/DPAS opcodes may have the right source and destination patterns + * to have their sources replaced by load_reg, but these instructions + * are special and / or wierd. They should not be modified. + * + * MOV_INDIRECT/BROADCAST read variable amount of GRF for src0. This + * pass does not handle this properly at the moment. */ if (inst->opcode == SHADER_OPCODE_UNDEF || - inst->opcode == BRW_OPCODE_DPAS) { + inst->opcode == BRW_OPCODE_DPAS || + inst->opcode == SHADER_OPCODE_MOV_INDIRECT || + inst->opcode == SHADER_OPCODE_BROADCAST) { continue; }