From aa86c3a23536c6a56832059e5bb249913b8b3f3d Mon Sep 17 00:00:00 2001 From: Ruijing Dong Date: Tue, 16 Jul 2024 21:29:23 -0400 Subject: [PATCH] radeonsi/vcn: input av1 hdr metadata get av1 hdr metadata from frontends. Reviewed-by: David Rosca Signed-off-by: Ruijing Dong Part-of: --- src/amd/common/ac_vcn_enc.h | 27 ++++++++++++ src/gallium/drivers/radeonsi/radeon_vcn_enc.c | 41 +++++++++++++++++++ src/gallium/drivers/radeonsi/radeon_vcn_enc.h | 1 + 3 files changed, 69 insertions(+) diff --git a/src/amd/common/ac_vcn_enc.h b/src/amd/common/ac_vcn_enc.h index bc9c02658f3..a0a6849a4e9 100644 --- a/src/amd/common/ac_vcn_enc.h +++ b/src/amd/common/ac_vcn_enc.h @@ -574,6 +574,33 @@ typedef struct rvcn_enc_metadata_buffer_s { uint32_t two_pass_search_center_map_offset; } rvcn_enc_metadata_buffer_t; +typedef struct rvcn_enc_sei_hdr_cll_s { + uint16_t max_cll; + uint16_t max_fall; +} rvcn_enc_sei_hdr_cll_t; + +typedef struct rvcn_enc_sei_hdr_mdcv_s { + uint16_t primary_chromaticity_x[3]; + uint16_t primary_chromaticity_y[3]; + uint16_t white_point_chromaticity_x; + uint16_t white_point_chromaticity_y; + uint32_t luminance_max; + uint32_t luminance_min; +} rvcn_enc_sei_hdr_mdcv_t; + +/* shared sei structure */ +typedef struct rvcn_enc_seidata_s { + union { + struct { + uint32_t hdr_cll:1; + uint32_t hdr_mdcv:1; + }; + uint32_t value; + } flags; + rvcn_enc_sei_hdr_cll_t hdr_cll; + rvcn_enc_sei_hdr_mdcv_t hdr_mdcv; +} rvcn_enc_seidata_t; + typedef struct rvcn_enc_video_bitstream_buffer_s { uint32_t mode; uint32_t video_bitstream_buffer_address_hi; diff --git a/src/gallium/drivers/radeonsi/radeon_vcn_enc.c b/src/gallium/drivers/radeonsi/radeon_vcn_enc.c index 7239f8a4442..ee63845437a 100644 --- a/src/gallium/drivers/radeonsi/radeon_vcn_enc.c +++ b/src/gallium/drivers/radeonsi/radeon_vcn_enc.c @@ -857,6 +857,46 @@ static void radeon_vcn_enc_av1_get_tile_config(struct radeon_encoder *enc, enc->enc_pic.av1_tile_config.context_update_tile_id = pic->context_update_tile_id; } +static void radeon_vcn_enc_av1_get_meta_param(struct radeon_encoder *enc, + struct pipe_av1_enc_picture_desc *pic) +{ + memset (&enc->enc_pic.enc_sei, 0, sizeof(rvcn_enc_seidata_t)); + + if (!pic->metadata_flags.value) { + enc->enc_pic.enc_sei.flags.value = 0; + return; + } + + if (pic->metadata_flags.hdr_cll) { + enc->enc_pic.enc_sei.flags.hdr_cll = 1; + enc->enc_pic.enc_sei.hdr_cll = (rvcn_enc_sei_hdr_cll_t) { + .max_cll = pic->metadata_hdr_cll.max_cll, + .max_fall = pic->metadata_hdr_cll.max_fall + }; + } + + if (pic->metadata_flags.hdr_mdcv) { + enc->enc_pic.enc_sei.flags.hdr_mdcv = 1; + for (int32_t i = 0; i < 3; i++) { + enc->enc_pic.enc_sei.hdr_mdcv.primary_chromaticity_x[i] + = pic->metadata_hdr_mdcv.primary_chromaticity_x[i]; + enc->enc_pic.enc_sei.hdr_mdcv.primary_chromaticity_y[i] + = pic->metadata_hdr_mdcv.primary_chromaticity_y[i]; + } + enc->enc_pic.enc_sei.hdr_mdcv.white_point_chromaticity_x = + pic->metadata_hdr_mdcv.white_point_chromaticity_x; + enc->enc_pic.enc_sei.hdr_mdcv.white_point_chromaticity_y = + pic->metadata_hdr_mdcv.white_point_chromaticity_y; + enc->enc_pic.enc_sei.hdr_mdcv.luminance_max = + pic->metadata_hdr_mdcv.luminance_max; + enc->enc_pic.enc_sei.hdr_mdcv.luminance_min = + pic->metadata_hdr_mdcv.luminance_min; + } + + /* meta data per picture will need to clear it after fetching it up */ + pic->metadata_flags.value = 0; +} + static void radeon_vcn_enc_av1_get_param(struct radeon_encoder *enc, struct pipe_av1_enc_picture_desc *pic) { @@ -917,6 +957,7 @@ static void radeon_vcn_enc_av1_get_param(struct radeon_encoder *enc, &pic->intra_refresh); radeon_vcn_enc_get_roi_param(enc, &pic->roi); radeon_vcn_enc_get_latency_param(enc); + radeon_vcn_enc_av1_get_meta_param(enc, pic); } static void radeon_vcn_enc_get_param(struct radeon_encoder *enc, struct pipe_picture_desc *picture) diff --git a/src/gallium/drivers/radeonsi/radeon_vcn_enc.h b/src/gallium/drivers/radeonsi/radeon_vcn_enc.h index 59d59e2a93a..b7513a460ac 100644 --- a/src/gallium/drivers/radeonsi/radeon_vcn_enc.h +++ b/src/gallium/drivers/radeonsi/radeon_vcn_enc.h @@ -188,6 +188,7 @@ struct radeon_enc_pic { rvcn_enc_qp_map_t enc_qp_map; rvcn_enc_metadata_buffer_t metadata; rvcn_enc_latency_t enc_latency; + rvcn_enc_seidata_t enc_sei; }; struct radeon_encoder {