From a90edad9f72607310f64be2fd0897ffa7d74a3d8 Mon Sep 17 00:00:00 2001 From: Kenneth Graunke Date: Wed, 27 Mar 2024 15:46:07 -0700 Subject: [PATCH] intel/brw: Fix generate_mov_indirect to check has_64bit_int not float We are overriding the type to Q/UQ, so we need to split to two MOVs if 64-bit integer math is not supported. For reference, Meteorlake does support 64-bit floats but would still not work correctly here. See also brw_broadcast(), which does similar indirects but correctly checks has_64bit_int instead of has_64bit_float. Cc: mesa-stable Reviewed-by: Ian Romanick Part-of: --- src/intel/compiler/brw_fs_generator.cpp | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/src/intel/compiler/brw_fs_generator.cpp b/src/intel/compiler/brw_fs_generator.cpp index 9fc335a8641..c69a487dccf 100644 --- a/src/intel/compiler/brw_fs_generator.cpp +++ b/src/intel/compiler/brw_fs_generator.cpp @@ -304,7 +304,7 @@ fs_generator::generate_mov_indirect(fs_inst *inst, reg.nr = imm_byte_offset / REG_SIZE; reg.subnr = imm_byte_offset % REG_SIZE; - if (type_sz(reg.type) > 4 && !devinfo->has_64bit_float) { + if (type_sz(reg.type) > 4 && !devinfo->has_64bit_int) { brw_MOV(p, subscript(dst, BRW_REGISTER_TYPE_D, 0), subscript(reg, BRW_REGISTER_TYPE_D, 0)); brw_set_default_swsb(p, tgl_swsb_null()); @@ -379,8 +379,7 @@ fs_generator::generate_mov_indirect(fs_inst *inst, brw_inst_set_no_dd_check(devinfo, insn, use_dep_ctrl); if (type_sz(reg.type) > 4 && - (intel_device_info_is_9lp(devinfo) || - !devinfo->has_64bit_float || devinfo->verx10 >= 125)) { + (intel_device_info_is_9lp(devinfo) || !devinfo->has_64bit_int)) { /* IVB has an issue (which we found empirically) where it reads two * address register components per channel for indirectly addressed * 64-bit sources.